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# Copyright (c) 2013-2015 ARM Limited
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#
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# to a hardware implementation of the functionality of the software
# licensed hereunder. You may use the software subject to the license
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# this software without specific prior written permission.
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# Authors: Rene de Jong
#
import sys
from m5.params import *
from m5.proxy import *
from Device import DmaDevice
from AbstractNVM import *
class UFSHostDevice(DmaDevice):
type = 'UFSHostDevice'
cxx_header = "dev/arm/ufs_device.hh"
pio_addr = Param.Addr("Address for SCSI configuration slave interface")
pio_latency = Param.Latency("10ns", "Time between action and write/read \
result by AMBA DMA Device")
gic = Param.BaseGic(Parent.any, "Gic to use for interrupting")
int_num = Param.UInt32("Interrupt number that connects to GIC")
img_blk_size = Param.UInt32(512, "Size of one image block in bytes")
# Every image that is added to the vector will generate a new logic unit
# in the UFS device; Theoretically (when using the driver from Linux
# kernel 3.9 onwards), this can be as many as eigth. Up to two have been
# tested.
image = VectorParam.DiskImage("Disk images")
# Every logic unit can have its own flash dimensions. So the number of
# images that have been provided in the image vector, should be equal to
# the number of flash objects that are created. Each logic unit can have
# its own flash dimensions; to allow the system to define a hetrogeneous
# storage system.
internalflash = VectorParam.AbstractNVM("Describes the internal flash")
ufs_slots = Param.UInt32(32, "Number of commands that can be queued in \
the Host controller (min: 1, max: 32)")