commit 84ba92ed750ce7b4183f6c2054dbf60d498053c6
author Giacomo Travaglini <giacomo.travaglini@arm.com> Wed May 09 17:56:03 2018 +0100
committer Giacomo Travaglini <giacomo.travaglini@arm.com> Tue May 29 10:16:56 2018 +0000
tree 8a4cf97ad4ee7e10a7b034c5d43eba4af8f8e609
parent 97c33d677f0130116ca40ca2e54a6aec7ad14961

arch-arm: S3_<op1>_<Cn>_<Cm>_<op2> are Implementation defined

In the AArch64 ISA, S3_<op1>_<Cn>_<Cm>_<op2> refers to a pool
of implementation defined registers, provided that reg numbers
are in the following range:

<op1> is in the range 0 - 7
<CRn> can take the values 11, 15
<CRm> is in the range 0 - 15
<op2> is in the range 0 - 7

Change-Id: I7edd013e5cea4887f5e4c5a81f4835b7de93bd50
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/10501
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>