tree d578e132772ba806c674e2f452153cc3024801ff
parent 2456c917ac654f6b67243c72a47240d22a2bf712
author Giacomo Travaglini <giacomo.travaglini@arm.com> 1524214229 +0100
committer Giacomo Travaglini <giacomo.travaglini@arm.com> 1527588473 +0000

arch-arm: Implement ARMv8.1 TTBR1_EL2 register

This patch implements the ARMv8.1 TTBR1_EL2 register, which is used for
getting the translation table base address when a Host Operating System
is running at EL2. (HCR_EL2.E2H = 1)

Change-Id: Ic0ab351cae3fd64855eda7c18c8757da0d7b8663
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/10382
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>