tree af2a15f7121cfe9848b1c8d11b44668d111959cc
parent 0fa5ed40c471429318c967833592aee0bd361dea
author Giacomo Travaglini <giacomo.travaglini@arm.com> 1522164151 +0100
committer Giacomo Travaglini <giacomo.travaglini@arm.com> 1523008721 +0000

arch-arm: Fix secure write of SCTLR when EL3 is AArch64

MiscRegisters are not banked between secure and non-secure mode if EL3
is not implemented or if EL3 is using AArch64 (highestELIs64).  In this
scenario a unique register is used and it is mapped to the NS version
(see snsBankedIndex implementation), so that a secure world read/write
should access the non secure storage.

Change-Id: Ica4182e3cdf4021d2bd1db23e477ce2bbf055926
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/9502
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>