commit 0747a432d25ade2c197ca6393270e12606419872
author Rekai Gonzalez-Alberquilla <Rekai.GonzalezAlberquilla@arm.com> Wed Apr 05 13:20:30 2017 -0500
committer Andreas Sandberg <andreas.sandberg@arm.com> Wed Jul 05 14:43:49 2017 +0000
tree f5583fdf4c90c6a95a0314506bc595d2a722d5c6
parent 2da7656a9a2fbf30cac0caffa4a2d168f736b4a1

arch: added generic vector register

This commit adds a new generic vector register to have a cleaner
implementation of SIMD ISAs.

Nathanael's idea, Rekai's implementation.

Change-Id: I60b250bba6423153b7e04d2e6988d517a70a3e6b
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2704
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>