cpu: MinorCPU handling IsSquashAfter flag MinorCPU was not handling IsSquashAfter flagged instructions. The behaviour was to force a branch (hence enforcing refetching) for SerializeAfter instructions only. This has now been extended to SquashAfter in order to correctly support ISB barrier instruction behaviour. Change-Id: Ie525b23350b0de121372d3b98b433e36b097d5c4 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/5702 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
diff --git a/src/cpu/minor/execute.cc b/src/cpu/minor/execute.cc index a38a767..7b76ca2 100644 --- a/src/cpu/minor/execute.cc +++ b/src/cpu/minor/execute.cc
@@ -219,13 +219,14 @@ const TheISA::PCState &pc_before = inst->pc; TheISA::PCState target = thread->pcState(); - /* Force a branch for SerializeAfter instructions at the end of micro-op - * sequence when we're not suspended */ + /* Force a branch for SerializeAfter/SquashAfter instructions + * at the end of micro-op sequence when we're not suspended */ bool force_branch = thread->status() != ThreadContext::Suspended && !inst->isFault() && inst->isLastOpInInst() && (inst->staticInst->isSerializeAfter() || - inst->staticInst->isIprAccess()); + inst->staticInst->isSquashAfter() || + inst->staticInst->isIprAccess()); DPRINTF(Branch, "tryToBranch before: %s after: %s%s\n", pc_before, target, (force_branch ? " (forcing)" : ""));