)]}'
{
  "id": "b38145246173b51e1a53141fb215432f30edcf95",
  "repo": "arm/gem5",
  "revision": "2a15bfd79ced20a6d4cbf0a0a4c2fbb1444b9a44",
  "path": "src/mem/protocol/MOESI_AMD_Base.slicc"
}