tree ab5e7c74b35c90c43c79cd5d40ba1f2751bbd05a
parent 719ddf73afa62735881ac68acf681abe1bf3bd17
author Alec Roelke <ar4jc@virginia.edu> 1510334623 -0500
committer Alec Roelke <ar4jc@virginia.edu> 1511917524 +0000

arch-riscv: Remove static parts of AMOs out of ISA

This patch removes the static parts of the RISC-V atomic memory
instructions out of the ISA generated code and into arch/riscv/insts. It
also makes the LR and SC instructions subclasses of MemInst from
arch/riscv/insts/mem.hh.

Change-Id: I6591f3d171045c4f1b457eb1264bbb7bd62b3e51
Reviewed-on: https://gem5-review.googlesource.com/6025
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Alec Roelke <ar4jc@virginia.edu>