)]}'
{
  "commit": "83f2b253989fd6dfc8f48d5368ae351ade91cfc6",
  "tree": "c11f04427040c2efedb3cbfea8227293861ba8ff",
  "parents": [
    "b074a15ec16b595cbe00cb63e2feff40059b60fb"
  ],
  "author": {
    "name": "Swapnil Haria",
    "email": "swapnilster@gmail.com",
    "time": "Mon Jan 15 21:49:17 2018 -0600"
  },
  "committer": {
    "name": "Jason Lowe-Power",
    "email": "jason@lowepower.com",
    "time": "Tue Jan 23 22:17:46 2018 +0000"
  },
  "message": "arch-x86: Adding clflush, clflushopt, clwb instructions\n\nThis patch adds support for cache flushing instructions in x86.\nIt piggybacks on support for similar instructions in arm ISA\nadded by Nikos Nikoleris. I have tested each instruction using\nmicrobenchmarks.\n\nChange-Id: I72b6b8dc30c236a21eff7958fa231f0663532d7d\nReviewed-on: https://gem5-review.googlesource.com/7401\nReviewed-by: Gabe Black \u003cgabeblack@google.com\u003e\nMaintainer: Gabe Black \u003cgabeblack@google.com\u003e\n",
  "tree_diff": [
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      "new_path": "src/arch/x86/cpuid.cc"
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      "new_mode": 33188,
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}