)]}'
{
  "commit": "8e17f07c295cec854d89cbf427bbd2f8dd915eda",
  "tree": "474b9791cdbb5920fa3b3ceff107b82d9a62184c",
  "parents": [
    "94553f32d8dbb7979dbeb0e6bafaa5db1985db1e"
  ],
  "author": {
    "name": "Giacomo Travaglini",
    "email": "giacomo.travaglini@arm.com",
    "time": "Wed Jan 24 15:53:43 2018 +0000"
  },
  "committer": {
    "name": "Giacomo Travaglini",
    "email": "giacomo.travaglini@arm.com",
    "time": "Fri Feb 16 09:32:53 2018 +0000"
  },
  "message": "arch-arm: Arch regs and pseudo regs distinction\n\nA new identifier has been introduced: NUM_PHYS_MISCREGS, which is used\nas a boundary for the number of physical (real) Misc registers in the\nsystem.  Pseudo registers (like CP15_UNIMPL) have been moved after the\nNUM_PHYS_MISCREGS identifier, so that their enum number is\n(NUM_PHYS_MISCREGS \u003c number \u003c NUM_MISCREGS).  Moving away those\nregisters has created some free slots that can be used for future Misc\nregister implementation.\nSERIALIZE and UNSERIALIZE now only save/restore PHYSICAL Misc Registers.\nThis allows us to define as many pseudo registers as we want without\nbeing concerned about checkpoint compatibility.\n\nChange-Id: I7e297b814eeaa4bee640e81bee625fb66710af45\nSigned-off-by: Giacomo Travaglini \u003cgiacomo.travaglini@arm.com\u003e\nReviewed-by: Andreas Sandberg \u003candreas.sandberg@arm.com\u003e\nReviewed-on: https://gem5-review.googlesource.com/7921\nMaintainer: Andreas Sandberg \u003candreas.sandberg@arm.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "1711ee0bef4a5d3b15246b488ad78ab32f8ea144",
      "old_mode": 33188,
      "old_path": "src/arch/arm/isa.hh",
      "new_id": "aa905e500fa0645361bd7cfc26db6e9d1f5f9fb0",
      "new_mode": 33188,
      "new_path": "src/arch/arm/isa.hh"
    },
    {
      "type": "modify",
      "old_id": "8cfa0134515dfde4069cd944ccd1c0155a018287",
      "old_mode": 33188,
      "old_path": "src/arch/arm/miscregs.hh",
      "new_id": "cb4dcab8ce13fa03ea503878d5e156a7e569b474",
      "new_mode": 33188,
      "new_path": "src/arch/arm/miscregs.hh"
    }
  ]
}