tree 474b9791cdbb5920fa3b3ceff107b82d9a62184c
parent 94553f32d8dbb7979dbeb0e6bafaa5db1985db1e
author Giacomo Travaglini <giacomo.travaglini@arm.com> 1516809223 +0000
committer Giacomo Travaglini <giacomo.travaglini@arm.com> 1518773573 +0000

arch-arm: Arch regs and pseudo regs distinction

A new identifier has been introduced: NUM_PHYS_MISCREGS, which is used
as a boundary for the number of physical (real) Misc registers in the
system.  Pseudo registers (like CP15_UNIMPL) have been moved after the
NUM_PHYS_MISCREGS identifier, so that their enum number is
(NUM_PHYS_MISCREGS < number < NUM_MISCREGS).  Moving away those
registers has created some free slots that can be used for future Misc
register implementation.
SERIALIZE and UNSERIALIZE now only save/restore PHYSICAL Misc Registers.
This allows us to define as many pseudo registers as we want without
being concerned about checkpoint compatibility.

Change-Id: I7e297b814eeaa4bee640e81bee625fb66710af45
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/7921
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>