)]}'
{
  "commit": "a3bb33b257324ad9da3e656e30ba61e6f4b5497f",
  "tree": "f96fcfd5b9d68f65af3e62da12a168c3f58a4cc7",
  "parents": [
    "68eb852d62864b2093c365ce2a80e9fd39908312"
  ],
  "author": {
    "name": "Andreas Sandberg",
    "email": "andreas.sandberg@arm.com",
    "time": "Tue Feb 13 19:01:17 2018 +0000"
  },
  "committer": {
    "name": "Giacomo Travaglini",
    "email": "giacomo.travaglini@arm.com",
    "time": "Tue Feb 20 13:30:02 2018 +0000"
  },
  "message": "cpu-o3: Don\u0027t add non-speculative mem barriers to the IQ twice\n\nThere are cases where the IEW adds a non-speculative instruction to\nthe IQ twice. This can happen if an instruction is flagged as\nIsMemBarrier and IsNonSpeculative. Avoid adding non-speculative\ninstructions in the IEW to the IQ by checking if it has been added\nalready.\n\nChange-Id: Ifcff676a451b57b2406ce00ed8dae19ed399515f\nSigned-off-by: Andreas Sandberg \u003candreas.sandberg@arm.com\u003e\nReviewed-by: Javier Setoain \u003cjavier.setoain@arm.com\u003e\nReviewed-by: Giacomo Gabrielli \u003cgiacomo.gabrielli@arm.com\u003e\nReviewed-on: https://gem5-review.googlesource.com/8374\nReviewed-by: Jason Lowe-Power \u003cjason@lowepower.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "80d7adc5416b35bd270b5c6a554fc22456766385",
      "old_mode": 33188,
      "old_path": "src/cpu/o3/iew_impl.hh",
      "new_id": "8270a71b519c2b6b4f0de85f268e103d5f39ae3d",
      "new_mode": 33188,
      "new_path": "src/cpu/o3/iew_impl.hh"
    }
  ]
}