)]}'
{
  "id": "328e1a5da39ff8fde5350386f241af8f53c62c02",
  "repo": "arm/gem5",
  "revision": "a7083ece990adddfd3bec8b48c5db7dee1781d55",
  "path": "src/mem/protocol/MOESI_AMD_Base-Region-dir.sm"
}