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gem5
/
arm
/
gem5
/
ef5a7d91a5233521e82c68b1bace70852eda1ea4
/
.
/
python
/
m5
/
objects
/
IntrControl.mpy
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simobj
IntrControl
(
SimObject
):
type
=
'IntrControl'
cpu
=
Param
.
BaseCPU
(
parent
.
any
,
"the cpu"
)
