tree acb02a2876489805fa17db918f20ef5693f62b0a
parent 4d9811cc5fd36a972e340ad82b14ab0ccaeb5cfa
author Nikos Nikoleris <nikos.nikoleris@arm.com> 1513720148 +0000
committer Nikos Nikoleris <nikos.nikoleris@arm.com> 1518020079 +0000

arch-arm: Turn dc ivac to dc civac when some conditions are met

The Arm ARM defines that at EL1 a data cache invalidate instruction
performs a data cache clean and invalidate operation if all of the
following apply:
* EL2 is implemented,
* HCR_EL2.VM is set to 1,
* SCR_EL3.NS is set to 1 or EL3 is not implemented.
This changeset implements this behavior.

Change-Id: I6b6aef2f4b1e7eb107c069fdb0a10f4aa8e6b196
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/7826
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>