)]}'
{
  "id": "0ad335740b5bcb7502635f4832043bc0252abd13",
  "repo": "arm/gem5",
  "revision": "e9f736738d61775cd3b739dbc9f85cbf4f4c135f",
  "path": "src/mem/protocol/MOESI_AMD_Base-RegionDir.sm"
}