)]}'
{
  "id": "b38145246173b51e1a53141fb215432f30edcf95",
  "repo": "arm/gem5",
  "revision": "fd678694ee6bf9defe10d76e01c3e728a25d1871",
  "path": "src/mem/protocol/MOESI_AMD_Base.slicc"
}