tree 7f8ee18ead39a4185a2f1e3160fb8aa2d2be8396
parent 3396bd47266acf5741be76ec4a76e0e714bd5d4d
author Christopher Daniel Emmons <chris.emmons@arm.com> 1404342714 -0700
committer Chris Emmons <chris.emmons@arm.com> 1421187701 -0600

ARM: Fix broken coherency for DMA ops

This fixes a problem with dc zva/WriteInvalidate testing on v7. The
The system has coherent I/O and the kernel needs to know this.

What would happen is the IO cache would hold DMA descriptor information
in Exclusive state and the core would send uncacheable requests that
effectively bypassed the coherence.  The IO device would then act on
incoherent data.