blob: d86fe33c5f538a206ed26421b54482d9058b1b3b [file] [log] [blame]
* Entry of the second core for CSR Marco dual-core SMP SoCs
* Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
* Licensed under GPLv2 or later.
#include <linux/linkage.h>
#include <linux/init.h>
* SIRFSOC specific entry point for secondary CPUs. This provides
* a "holding pen" into which all secondary cores are held until we're
* ready for them to initialise.
bl v7_invalidate_l1
mrc p15, 0, r0, c0, c0, 5
and r0, r0, #15
adr r4, 1f
ldmia r4, {r5, r6}
sub r4, r4, r5
add r6, r6, r4
pen: ldr r7, [r6]
cmp r7, r0
bne pen
* we've been released from the holding pen: secondary_stack
* should now contain the SVC stack for this core
b secondary_startup
1: .long .
.long pen_release