ARM: dts: Enable USB support on Exynso5420 platform
Adding required DT nodes to enable support for USB 2.0 (EHCI/OHCI)
and USB 3.0 (DWC3) on exynos5420 platform.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 8e2e734..98bb55a 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -46,6 +46,8 @@
spi0 = &spi_0;
spi1 = &spi_1;
spi2 = &spi_2;
+ usb3phy0 = &usb3_phy0;
+ usb3phy1 = &usb3_phy1;
};
cpus {
@@ -720,4 +722,97 @@
clocks = <&clock 319>, <&clock 318>;
clock-names = "tmu_apbif", "tmu_triminfo_apbif";
};
+
+ usb@12000000 {
+ compatible = "samsung,exynos5250-dwusb3";
+ clocks = <&clock 366>;
+ clock-names = "usbdrd30";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ dwc3 {
+ compatible = "synopsys,dwc3";
+ reg = <0x12000000 0x10000>;
+ interrupts = <0 72 0>;
+ usb-phy = <&usb2_phy &usb3_phy0>;
+ };
+ };
+
+ usb3_phy0: usbphy@12100000 {
+ compatible = "samsung,exynos5250-usb3phy";
+ reg = <0x12100000 0x100>;
+ clocks = <&clock 1>, <&clock 366>;
+ clock-names = "ext_xtal", "usbdrd30";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ usbphy-sys {
+ reg = <0x10040704 0xc>;
+ };
+ };
+
+ usb@12110000 {
+ compatible = "samsung,exynos4210-ehci";
+ reg = <0x12110000 0x100>;
+ interrupts = <0 71 0>;
+
+ clocks = <&clock 365>;
+ clock-names = "usbhost";
+ };
+
+ usb@12120000 {
+ compatible = "samsung,exynos4210-ohci";
+ reg = <0x12120000 0x100>;
+ interrupts = <0 71 0>;
+
+ clocks = <&clock 365>;
+ clock-names = "usbhost";
+ };
+
+ usb2_phy: usbphy@12130000 {
+ compatible = "samsung,exynos5250-usb2phy";
+ reg = <0x12130000 0x100>;
+ clocks = <&clock 1>, <&clock 365>;
+ clock-names = "ext_xtal", "usbhost";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ usbphy-sys {
+ reg = <0x10040704 0xc>,
+ <0x10050230 0x4>;
+ };
+ };
+
+ usb@12400000 {
+ compatible = "samsung,exynos5250-dwusb3";
+ clocks = <&clock 367>;
+ clock-names = "usbdrd30";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ dwc3 {
+ compatible = "synopsys,dwc3";
+ reg = <0x12400000 0x10000>;
+ interrupts = <0 73 0>;
+ usb-phy = <&usb2_phy &usb3_phy1>;
+ };
+ };
+
+ usb3_phy1: usbphy@12500000 {
+ compatible = "samsung,exynos5250-usb3phy";
+ reg = <0x12500000 0x100>;
+ clocks = <&clock 1>, <&clock 367>;
+ clock-names = "ext_xtal", "usbdrd30";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ usbphy-sys {
+ reg = <0x10040704 0xc>;
+ };
+ };
};
