HDLcd: Enable 4K resolution for gem5
This patch adds a 4K resolution option to the HDLcd controller
which the real hardware is not capable of. This mode will be useful
for future-looking studies. The default resolution is unchanged;
you will need to update the dts file to enable 4K (see the new
comment in the dts file HDLcd controller section). You will also
want to change the HDLcd oscillator frequency in RealView.py to get
the frame rate you want as writing of the Versatile Express
oscillator registers currently doesn't have any effect on the gem5
model. Tested with Android Jelly Bean.
Signed-off-by: Christopher Daniel Emmons <chris.emmons@arm.com>
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1-gem5.dts b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1-gem5.dts
index 0ac3e65..078079e 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1-gem5.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1-gem5.dts
@@ -62,6 +62,7 @@
clocks = <&oscclk5>;
clock-names = "pxlclk";
mode = "1024x768-16@60";
+// mode = "3840x2160M-16@60m"; // 4K mode string
framebuffer = <0 0xbf000000 0 0x01000000>;
};
/*
@@ -167,7 +168,9 @@
/* HDLCD PLL reference clock */
compatible = "arm,vexpress-osc";
arm,vexpress-sysreg,func = <1 5>;
- freq-range = <23750000 165000000>;
+// freq-range = <23750000 165000000>; // original
+ freq-range = <23750000 1000000000>; // for gem5 extended
+ // resolution support
#clock-cells = <0>;
clock-output-names = "oscclk5";
};
diff --git a/drivers/video/vexpress-dvi.c b/drivers/video/vexpress-dvi.c
index f087534..bf5f0cb 100644
--- a/drivers/video/vexpress-dvi.c
+++ b/drivers/video/vexpress-dvi.c
@@ -30,6 +30,7 @@
{ 1280, 1024, 3 }, /* SXGA */
{ 1600, 1200, 4 }, /* UXGA */
{ 1920, 1080, 5 }, /* HD1080 */
+ { 3840, 2160, 6 }, /* 4K - gem5 only */
};
static void vexpress_dvi_mode_set(struct fb_info *info, u32 xres, u32 yres)
diff --git a/include/linux/arm-hdlcd.h b/include/linux/arm-hdlcd.h
index 939f3a8..fb80fdd 100644
--- a/include/linux/arm-hdlcd.h
+++ b/include/linux/arm-hdlcd.h
@@ -81,8 +81,14 @@
/* Max resolution supported is 4096x4096, 8 bit per color component,
8 bit alpha, but we are going to choose the usual hardware default
(2048x2048, 32 bpp) and enable double buffering */
-#define HDLCD_MAX_XRES 2048
-#define HDLCD_MAX_YRES 2048
+//#define HDLCD_MAX_XRES 2048
+//#define HDLCD_MAX_YRES 2048
+
+/* For gem5, we want to support up to 8K, so these values adjusted accordingly.
+ Since our HW is just a model, it can support whatever we like. */
+#define HDLCD_MAX_XRES 8192
+#define HDLCD_MAX_YRES 8192
+
#define HDLCD_MAX_FRAMEBUFFER_SIZE (HDLCD_MAX_XRES * HDLCD_MAX_YRES << 2)
#define HDLCD_MEM_BASE (CONFIG_PAGE_OFFSET - 0x1000000)
