tree c3b72b78d9bc11d41d48f20d2bccff3d5e2128f4
parent 05440ad637ca2d0921d9a908bb02b99abdedf847
author Victor Kamensky <victor.kamensky@linaro.org> 1383955126 -0800
committer Andrey Konovalov <andrey.konovalov@linaro.org> 1397677917 +0400

mmc: dw_mmc endian fix

Need to use endian neutral functions to read/write h/w registers. I.e
__raw_readl replaced with readl_relaxed and __raw_writel replaced with
writel_relaxed. The relaxed version of function will read/write LE h/w
register and byteswap it if host operates in BE mode.

However in case of this file __raw_read(wlq) and __raw_write(wlq) are also
used to transfer data from uchar buffer into h/w mmc host register. And in
this case byteswap is not need - bytes of data buffer should go into h/w
register in the same order as they are in memory. So we need to split control
mci_readl/mci_writel macros from one that operates on data mci_readw_data,
mci_readl_data, mci_readq_data, mci_writew, mci_writel_data, mci_writeq_data.
The latter one do not do byte swaps.

Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org>