tree 29de7856d7e0e0ffaf6ec10899cfbceb8bdadb94
parent 3b01425664496adc7bbb3c9c2033c7cdb74f7086
author Rene de Jong <rene.dejong@arm.com> 1380191915 -0700
committer Chris Emmons <chris.emmons@arm.com> 1421187697 -0600

This patch introduces the possibility to read registers as 64 bit values.
The gem5 NVMe device adheres to that; but the io.h functions do not. This
has as consequence that the reading of those registers get split up in two
transactions of 32 bits. This is not supported by the NVMe device.

According to the NVMe spec, certain registers must be read as 64 bit values.