| commit | 4e73238d163c6fcf001264832701d2a6d4927672 | [log] [tgz] |
|---|---|---|
| author | Wu Zhangjin <wuzhangjin@gmail.com> | Fri May 07 00:59:46 2010 +0800 |
| committer | Ralf Baechle <ralf@linux-mips.org> | Sat May 15 21:59:54 2010 +0100 |
| tree | bf8b9aa38ffec794d44cb1a81ee99c52e4d6b5f0 | |
| parent | 46afb8296c2494bfce17064124b253eb9b176ef9 [diff] |
MIPS: Oprofile: Fix Loongson irq handler
The interrupt enable bit for the performance counters is in the Control
Register $24, not in the counter register.
loongson2_perfcount_handler(), we need to use
Reported-by: Xu Hengyang <hengyang@mail.ustc.edu.cn>
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1198/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---