[ARM] 3645/1: S3C2412: irq support for external interrupts
Patch from Ben Dooks
Move the decoding of the IRQ_EXT4 and above out of
the entry macro, and into an chained irq handler
as the EXTINT registers move depending on the CPU
being used.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
diff --git a/include/asm-arm/arch-s3c2410/entry-macro.S b/include/asm-arm/arch-s3c2410/entry-macro.S
index 894c35c..e09a6b8 100644
--- a/include/asm-arm/arch-s3c2410/entry-macro.S
+++ b/include/asm-arm/arch-s3c2410/entry-macro.S
@@ -18,8 +18,6 @@
#define INTPND (0x10)
#define INTOFFSET (0x14)
-#define EXTINTPEND (0xa8)
-#define EXTINTMASK (0xa4)
#include <asm/hardware.h>
#include <asm/arch/irqs.h>
@@ -28,37 +26,23 @@
mov \base, #S3C24XX_VA_IRQ
- ldr \irqstat, [ \base, #INTPND]
- bics \irqnr, \irqstat, #3<<4 @@ only an GPIO IRQ
- beq 2000f
-
@@ try the interrupt offset register, since it is there
+ ldr \irqstat, [ \base, #INTPND ]
+ teq \irqstat, #0
+ beq 1002f
ldr \irqnr, [ \base, #INTOFFSET ]
mov \tmp, #1
tst \irqstat, \tmp, lsl \irqnr
- addne \irqnr, \irqnr, #IRQ_EINT0
bne 1001f
@@ the number specified is not a valid irq, so try
@@ and work it out for ourselves
- mov \irqnr, #IRQ_EINT0 @@ start here
- b 3000f
-
-2000:
- @@ load the GPIO interrupt register, and check it
-
- add \tmp, \base, #S3C24XX_VA_GPIO - S3C24XX_VA_IRQ
- ldr \irqstat, [ \tmp, # EXTINTPEND ]
- ldr \irqnr, [ \tmp, # EXTINTMASK ]
- bics \irqstat, \irqstat, \irqnr
- beq 1001f
-
- mov \irqnr, #(IRQ_EINT4 - 4)
+ mov \irqnr, #0 @@ start here
@@ work out which irq (if any) we got
-3000:
+
movs \tmp, \irqstat, lsl#16
addeq \irqnr, \irqnr, #16
moveq \irqstat, \irqstat, lsr#16
@@ -75,9 +59,9 @@
addeq \irqnr, \irqnr, #1
@@ we have the value
- movs \irqnr, \irqnr
-
1001:
+ adds \irqnr, \irqnr, #IRQ_EINT0
+1002:
@@ exit here, Z flag unset if IRQ
.endm
diff --git a/include/asm-arm/arch-s3c2410/regs-irq.h b/include/asm-arm/arch-s3c2410/regs-irq.h
index 24b7292..572fca5 100644
--- a/include/asm-arm/arch-s3c2410/regs-irq.h
+++ b/include/asm-arm/arch-s3c2410/regs-irq.h
@@ -23,6 +23,7 @@
#define S3C2410_IRQREG(x) ((x) + S3C24XX_VA_IRQ)
#define S3C2410_EINTREG(x) ((x) + S3C24XX_VA_GPIO)
+#define S3C24XX_EINTREG(x) ((x) + S3C24XX_VA_GPIO2)
#define S3C2410_SRCPND S3C2410_IRQREG(0x000)
#define S3C2410_INTMOD S3C2410_IRQREG(0x004)
@@ -40,5 +41,10 @@
#define S3C2410_EINTMASK S3C2410_EINTREG(0x0A4)
#define S3C2410_EINTPEND S3C2410_EINTREG(0X0A8)
+#define S3C2412_EINTMASK S3C2410_EINTREG(0x0B4)
+#define S3C2412_EINTPEND S3C2410_EINTREG(0X0B8)
+
+#define S3C24XX_EINTMASK S3C24XX_EINTREG(0x0A4)
+#define S3C24XX_EINTPEND S3C24XX_EINTREG(0X0A8)
#endif /* ___ASM_ARCH_REGS_IRQ_H */
