)]}'
{
  "commit": "17049d30c2dec6f26d6165cc135578f9e41d53d3",
  "tree": "b58a6c005d89c15a58213cc2e62e9d4de81d8c37",
  "parents": [
    "3b97fd695453ced96f22bdf1a84453f6744d25cc"
  ],
  "author": {
    "name": "John Fastabend",
    "email": "john.r.fastabend@intel.com",
    "time": "Wed Feb 23 05:58:19 2011 +0000"
  },
  "committer": {
    "name": "Jeff Kirsher",
    "email": "jeffrey.t.kirsher@intel.com",
    "time": "Sat Mar 12 04:12:54 2011 -0800"
  },
  "message": "ixgbe: IEEE 802.1Qaz, implement priority assignment table\n\nThis patch adds support to use the priority assignment\ntable in the ieee_ets structure to map priorities to\ntraffic classes. Previously ixgbe only supported a\n1:1 mapping. Now we can enable and disable hardware\nDCB support when multiple traffic classes are actually\nbeing used. This allows the default case all priorities\nmapped to traffic class 0 to work in normal hardware\nmode and utilize the full packet buffer.\n\nThis patch does not address putting the hardware in\n4TC mode so packet buffer space may be underutilized\nin this case. A follow up patch can address this\noptimization. But at least we have the hooks to do\nthis now.\n\nAlso CEE will behave as it always has and map priorities\n1:1 with traffic classes.\n\nSigned-off-by: John Fastabend \u003cjohn.r.fastabend@intel.com\u003e\nTested-by: Ross Brattain \u003cross.b.brattain@intel.com\u003e\nSigned-off-by: Jeff Kirsher \u003cjeffrey.t.kirsher@intel.com\u003e\n",
  "tree_diff": [
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      "new_id": "e7b551af573ddd486e66f17a1814fc4081558c66",
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      "new_path": "drivers/net/ixgbe/ixgbe_dcb.c"
    },
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    },
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    {
      "type": "modify",
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}