commit 19bf09cecfec1891069f1d5353a0298debd98713
author Alexandre Courbot <acourbot@nvidia.com> Wed Apr 29 23:04:23 2015 +0900
committer Ben Skeggs <bskeggs@redhat.com> Mon Jul 27 18:56:08 2015 +1000
tree 745eb98dc5c6a199bdbc4f3caae55a5d10cdcfa7
parent 1addc12648521d15ef33c1a88d0354850190dfa7

drm/nouveau/gr/gf100: wait on bottom half of FE's pipeline

When emitting the ICMD bundle, wait on the bottom half (bit 3 of the
GR_STATUS register) instead of upper half (bit 2) to make sure methods
are effectively emitted.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
index 5606c25..01efc2c 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
@@ -699,7 +699,7 @@
 
 		while (addr < next) {
 			nv_wr32(priv, 0x400200, addr);
-			nv_wait(priv, 0x400700, 0x00000002, 0x00000000);
+			nv_wait(priv, 0x400700, 0x00000004, 0x00000000);
 			addr += init->pitch;
 		}
 	}