)]}'
{
  "commit": "1b6b8ce2ac372ea1f2065b89228ede105eb68dc5",
  "tree": "12a67c35d30ee626ca46d497c35f3a7d952034c5",
  "parents": [
    "b10ceb5530df7ee6e81f92910589a34dd3e5690b"
  ],
  "author": {
    "name": "Yu Zhao",
    "email": "yu.zhao@intel.com",
    "time": "Thu Apr 09 14:57:39 2009 +0800"
  },
  "committer": {
    "name": "Jesse Barnes",
    "email": "jbarnes@virtuousgeek.org",
    "time": "Wed Apr 22 15:59:41 2009 -0700"
  },
  "message": "PCI: only save/restore existent registers in the PCIe capability\n\nPCIe 1.1 base neither requires the endpoint to implement the entire\nPCIe capability structure nor specifies default values of registers\nthat are not implemented by the device. So we only save and restore\nregisters that must be implemented by different device types if the\ndevice PCIe capability version is 1.\n\nPCIe 1.1 Capability Structure Expansion ECN and PCIe 2.0 requires\nall registers in the PCIe capability to be either implemented or\nhardwired to 0. Their PCIe capability version is 2.\n\nSigned-off-by: Yu Zhao \u003cyu.zhao@intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "16fd0d4c316655dbcfb8729f82a9aef5cabb7e8c",
      "old_mode": 33188,
      "old_path": "drivers/pci/pci.c",
      "new_id": "34bf0fdf5047c63dc6aefebc35a8b26b8699009e",
      "new_mode": 33188,
      "new_path": "drivers/pci/pci.c"
    },
    {
      "type": "modify",
      "old_id": "e4d08c1b2e0b40689d74911624468762eea0e281",
      "old_mode": 33188,
      "old_path": "include/linux/pci_regs.h",
      "new_id": "616bf8b3c8b548707a84b6579b0d31d7f3b840ee",
      "new_mode": 33188,
      "new_path": "include/linux/pci_regs.h"
    }
  ]
}
