commit | 25824d52caa8e614b695a7197a8edde19f5b02ad | [log] [tgz] |
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author | Jiancheng Xue <xuejiancheng@hisilicon.com> | Sat Apr 23 15:40:28 2016 +0800 |
committer | Stephen Boyd <sboyd@codeaurora.org> | Fri May 06 11:13:29 2016 -0700 |
tree | 5f183fec712cdf5802e858d4112483eaf98f6ec8 | |
parent | f55532a0c0b8bb6148f4e07853b876ef73bc69ca [diff] |
reset: hisilicon: add reset controller driver for hisilicon SOCs In most of hisilicon SOCs, reset controller and clock provider are combined together as a block named CRG (Clock and Reset Generator). This patch mainly implements the reset function. Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>