| /* |
| * Exynos5 SoC series Power Management Unit (PMU) register offsets |
| * and bit definitions. |
| * |
| * Copyright (C) 2014 Samsung Electronics Co., Ltd. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * published by the Free Software Foundation. |
| */ |
| |
| #ifndef _LINUX_MFD_SYSCON_PMU_EXYNOS5_H_ |
| #define _LINUX_MFD_SYSCON_PMU_EXYNOS5_H_ |
| |
| #define EXYNOS5_PHY_ENABLE BIT(0) |
| #define EXYNOS5_MIPI_PHY_S_RESETN BIT(1) |
| #define EXYNOS5_MIPI_PHY_M_RESETN BIT(2) |
| |
| #endif /* _LINUX_MFD_SYSCON_PMU_EXYNOS5_H_ */ |
