blob: 6df651a94b0a1af9fa172547a37d2e4de786d142 [file] [log] [blame]
/*
* DCE_11_0 Register documentation
*
* Copyright (C) 2014 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
* AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef DCE_11_0_D_H
#define DCE_11_0_D_H
#define mmPIPE0_PG_CONFIG 0x2c0
#define mmPIPE0_PG_ENABLE 0x2c1
#define mmPIPE0_PG_STATUS 0x2c2
#define mmPIPE1_PG_CONFIG 0x2c3
#define mmPIPE1_PG_ENABLE 0x2c4
#define mmPIPE1_PG_STATUS 0x2c5
#define mmPIPE2_PG_CONFIG 0x2c6
#define mmPIPE2_PG_ENABLE 0x2c7
#define mmPIPE2_PG_STATUS 0x2c8
#define mmDCFEV0_PG_CONFIG 0x2db
#define mmDCFEV0_PG_ENABLE 0x2dc
#define mmDCFEV0_PG_STATUS 0x2dd
#define mmDCPG_INTERRUPT_STATUS 0x2de
#define mmDCPG_INTERRUPT_CONTROL 0x2df
#define mmDC_IP_REQUEST_CNTL 0x2d2
#define mmDC_PGFSM_CONFIG_REG 0x2d3
#define mmDC_PGFSM_WRITE_REG 0x2d4
#define mmDC_PGCNTL_STATUS_REG 0x2d5
#define mmDCPG_TEST_DEBUG_INDEX 0x2d6
#define mmDCPG_TEST_DEBUG_DATA 0x2d7
#define mmBL1_PWM_AMBIENT_LIGHT_LEVEL 0x1628
#define mmBL1_PWM_USER_LEVEL 0x1629
#define mmBL1_PWM_TARGET_ABM_LEVEL 0x162a
#define mmBL1_PWM_CURRENT_ABM_LEVEL 0x162b
#define mmBL1_PWM_FINAL_DUTY_CYCLE 0x162c
#define mmBL1_PWM_MINIMUM_DUTY_CYCLE 0x162d
#define mmBL1_PWM_ABM_CNTL 0x162e
#define mmBL1_PWM_BL_UPDATE_SAMPLE_RATE 0x162f
#define mmBL1_PWM_GRP2_REG_LOCK 0x1630
#define mmDC_ABM1_CNTL 0x1638
#define mmDC_ABM1_IPCSC_COEFF_SEL 0x1639
#define mmDC_ABM1_ACE_OFFSET_SLOPE_0 0x163a
#define mmDC_ABM1_ACE_OFFSET_SLOPE_1 0x163b
#define mmDC_ABM1_ACE_OFFSET_SLOPE_2 0x163c
#define mmDC_ABM1_ACE_OFFSET_SLOPE_3 0x163d
#define mmDC_ABM1_ACE_OFFSET_SLOPE_4 0x163e
#define mmDC_ABM1_ACE_THRES_12 0x163f
#define mmDC_ABM1_ACE_THRES_34 0x1640
#define mmDC_ABM1_ACE_CNTL_MISC 0x1641
#define mmDC_ABM1_DEBUG_MISC 0x1649
#define mmDC_ABM1_HGLS_REG_READ_PROGRESS 0x164a
#define mmDC_ABM1_HG_MISC_CTRL 0x164b
#define mmDC_ABM1_LS_SUM_OF_LUMA 0x164c
#define mmDC_ABM1_LS_MIN_MAX_LUMA 0x164d
#define mmDC_ABM1_LS_FILTERED_MIN_MAX_LUMA 0x164e
#define mmDC_ABM1_LS_PIXEL_COUNT 0x164f
#define mmDC_ABM1_LS_OVR_SCAN_BIN 0x1650
#define mmDC_ABM1_LS_MIN_MAX_PIXEL_VALUE_THRES 0x1651
#define mmDC_ABM1_LS_MIN_PIXEL_VALUE_COUNT 0x1652
#define mmDC_ABM1_LS_MAX_PIXEL_VALUE_COUNT 0x1653
#define mmDC_ABM1_HG_SAMPLE_RATE 0x1654
#define mmDC_ABM1_LS_SAMPLE_RATE 0x1655
#define mmDC_ABM1_HG_BIN_1_32_SHIFT_FLAG 0x1656
#define mmDC_ABM1_HG_BIN_1_8_SHIFT_INDEX 0x1657
#define mmDC_ABM1_HG_BIN_9_16_SHIFT_INDEX 0x1658
#define mmDC_ABM1_HG_BIN_17_24_SHIFT_INDEX 0x1659
#define mmDC_ABM1_HG_BIN_25_32_SHIFT_INDEX 0x165a
#define mmDC_ABM1_HG_RESULT_1 0x165b
#define mmDC_ABM1_HG_RESULT_2 0x165c
#define mmDC_ABM1_HG_RESULT_3 0x165d
#define mmDC_ABM1_HG_RESULT_4 0x165e
#define mmDC_ABM1_HG_RESULT_5 0x165f
#define mmDC_ABM1_HG_RESULT_6 0x1660
#define mmDC_ABM1_HG_RESULT_7 0x1661
#define mmDC_ABM1_HG_RESULT_8 0x1662
#define mmDC_ABM1_HG_RESULT_9 0x1663
#define mmDC_ABM1_HG_RESULT_10 0x1664
#define mmDC_ABM1_HG_RESULT_11 0x1665
#define mmDC_ABM1_HG_RESULT_12 0x1666
#define mmDC_ABM1_HG_RESULT_13 0x1667
#define mmDC_ABM1_HG_RESULT_14 0x1668
#define mmDC_ABM1_HG_RESULT_15 0x1669
#define mmDC_ABM1_HG_RESULT_16 0x166a
#define mmDC_ABM1_HG_RESULT_17 0x166b
#define mmDC_ABM1_HG_RESULT_18 0x166c
#define mmDC_ABM1_HG_RESULT_19 0x166d
#define mmDC_ABM1_HG_RESULT_20 0x166e
#define mmDC_ABM1_HG_RESULT_21 0x166f
#define mmDC_ABM1_HG_RESULT_22 0x1670
#define mmDC_ABM1_HG_RESULT_23 0x1671
#define mmDC_ABM1_HG_RESULT_24 0x1672
#define mmDC_ABM1_OVERSCAN_PIXEL_VALUE 0x169b
#define mmDC_ABM1_BL_MASTER_LOCK 0x169c
#define mmABM_TEST_DEBUG_INDEX 0x169e
#define mmABM_TEST_DEBUG_DATA 0x169f
#define mmCRTC_H_BLANK_EARLY_NUM 0x1b7d
#define mmCRTC0_CRTC_H_BLANK_EARLY_NUM 0x1b7d
#define mmCRTC1_CRTC_H_BLANK_EARLY_NUM 0x1d7d
#define mmCRTC2_CRTC_H_BLANK_EARLY_NUM 0x1f7d
#define mmCRTC3_CRTC_H_BLANK_EARLY_NUM 0x417d
#define mmCRTC4_CRTC_H_BLANK_EARLY_NUM 0x437d
#define mmCRTC5_CRTC_H_BLANK_EARLY_NUM 0x457d
#define mmCRTC_H_TOTAL 0x1b80
#define mmCRTC0_CRTC_H_TOTAL 0x1b80
#define mmCRTC1_CRTC_H_TOTAL 0x1d80
#define mmCRTC2_CRTC_H_TOTAL 0x1f80
#define mmCRTC3_CRTC_H_TOTAL 0x4180
#define mmCRTC4_CRTC_H_TOTAL 0x4380
#define mmCRTC5_CRTC_H_TOTAL 0x4580
#define mmCRTC_H_BLANK_START_END 0x1b81
#define mmCRTC0_CRTC_H_BLANK_START_END 0x1b81
#define mmCRTC1_CRTC_H_BLANK_START_END 0x1d81
#define mmCRTC2_CRTC_H_BLANK_START_END 0x1f81
#define mmCRTC3_CRTC_H_BLANK_START_END 0x4181
#define mmCRTC4_CRTC_H_BLANK_START_END 0x4381
#define mmCRTC5_CRTC_H_BLANK_START_END 0x4581
#define mmCRTC_H_SYNC_A 0x1b82
#define mmCRTC0_CRTC_H_SYNC_A 0x1b82
#define mmCRTC1_CRTC_H_SYNC_A 0x1d82
#define mmCRTC2_CRTC_H_SYNC_A 0x1f82
#define mmCRTC3_CRTC_H_SYNC_A 0x4182
#define mmCRTC4_CRTC_H_SYNC_A 0x4382
#define mmCRTC5_CRTC_H_SYNC_A 0x4582
#define mmCRTC_H_SYNC_A_CNTL 0x1b83
#define mmCRTC0_CRTC_H_SYNC_A_CNTL 0x1b83
#define mmCRTC1_CRTC_H_SYNC_A_CNTL 0x1d83
#define mmCRTC2_CRTC_H_SYNC_A_CNTL 0x1f83
#define mmCRTC3_CRTC_H_SYNC_A_CNTL 0x4183
#define mmCRTC4_CRTC_H_SYNC_A_CNTL 0x4383
#define mmCRTC5_CRTC_H_SYNC_A_CNTL 0x4583
#define mmCRTC_H_SYNC_B 0x1b84
#define mmCRTC0_CRTC_H_SYNC_B 0x1b84
#define mmCRTC1_CRTC_H_SYNC_B 0x1d84
#define mmCRTC2_CRTC_H_SYNC_B 0x1f84
#define mmCRTC3_CRTC_H_SYNC_B 0x4184
#define mmCRTC4_CRTC_H_SYNC_B 0x4384
#define mmCRTC5_CRTC_H_SYNC_B 0x4584
#define mmCRTC_H_SYNC_B_CNTL 0x1b85
#define mmCRTC0_CRTC_H_SYNC_B_CNTL 0x1b85
#define mmCRTC1_CRTC_H_SYNC_B_CNTL 0x1d85
#define mmCRTC2_CRTC_H_SYNC_B_CNTL 0x1f85
#define mmCRTC3_CRTC_H_SYNC_B_CNTL 0x4185
#define mmCRTC4_CRTC_H_SYNC_B_CNTL 0x4385
#define mmCRTC5_CRTC_H_SYNC_B_CNTL 0x4585
#define mmCRTC_VBI_END 0x1b86
#define mmCRTC0_CRTC_VBI_END 0x1b86
#define mmCRTC1_CRTC_VBI_END 0x1d86
#define mmCRTC2_CRTC_VBI_END 0x1f86
#define mmCRTC3_CRTC_VBI_END 0x4186
#define mmCRTC4_CRTC_VBI_END 0x4386
#define mmCRTC5_CRTC_VBI_END 0x4586
#define mmCRTC_V_TOTAL 0x1b87
#define mmCRTC0_CRTC_V_TOTAL 0x1b87
#define mmCRTC1_CRTC_V_TOTAL 0x1d87
#define mmCRTC2_CRTC_V_TOTAL 0x1f87
#define mmCRTC3_CRTC_V_TOTAL 0x4187
#define mmCRTC4_CRTC_V_TOTAL 0x4387
#define mmCRTC5_CRTC_V_TOTAL 0x4587
#define mmCRTC_V_TOTAL_MIN 0x1b88
#define mmCRTC0_CRTC_V_TOTAL_MIN 0x1b88
#define mmCRTC1_CRTC_V_TOTAL_MIN 0x1d88
#define mmCRTC2_CRTC_V_TOTAL_MIN 0x1f88
#define mmCRTC3_CRTC_V_TOTAL_MIN 0x4188
#define mmCRTC4_CRTC_V_TOTAL_MIN 0x4388
#define mmCRTC5_CRTC_V_TOTAL_MIN 0x4588
#define mmCRTC_V_TOTAL_MAX 0x1b89
#define mmCRTC0_CRTC_V_TOTAL_MAX 0x1b89
#define mmCRTC1_CRTC_V_TOTAL_MAX 0x1d89
#define mmCRTC2_CRTC_V_TOTAL_MAX 0x1f89
#define mmCRTC3_CRTC_V_TOTAL_MAX 0x4189
#define mmCRTC4_CRTC_V_TOTAL_MAX 0x4389
#define mmCRTC5_CRTC_V_TOTAL_MAX 0x4589
#define mmCRTC_V_TOTAL_CONTROL 0x1b8a
#define mmCRTC0_CRTC_V_TOTAL_CONTROL 0x1b8a
#define mmCRTC1_CRTC_V_TOTAL_CONTROL 0x1d8a
#define mmCRTC2_CRTC_V_TOTAL_CONTROL 0x1f8a
#define mmCRTC3_CRTC_V_TOTAL_CONTROL 0x418a
#define mmCRTC4_CRTC_V_TOTAL_CONTROL 0x438a
#define mmCRTC5_CRTC_V_TOTAL_CONTROL 0x458a
#define mmCRTC_V_TOTAL_INT_STATUS 0x1b8b
#define mmCRTC0_CRTC_V_TOTAL_INT_STATUS 0x1b8b
#define mmCRTC1_CRTC_V_TOTAL_INT_STATUS 0x1d8b
#define mmCRTC2_CRTC_V_TOTAL_INT_STATUS 0x1f8b
#define mmCRTC3_CRTC_V_TOTAL_INT_STATUS 0x418b
#define mmCRTC4_CRTC_V_TOTAL_INT_STATUS 0x438b
#define mmCRTC5_CRTC_V_TOTAL_INT_STATUS 0x458b
#define mmCRTC_VSYNC_NOM_INT_STATUS 0x1b8c
#define mmCRTC0_CRTC_VSYNC_NOM_INT_STATUS 0x1b8c
#define mmCRTC1_CRTC_VSYNC_NOM_INT_STATUS 0x1d8c
#define mmCRTC2_CRTC_VSYNC_NOM_INT_STATUS 0x1f8c
#define mmCRTC3_CRTC_VSYNC_NOM_INT_STATUS 0x418c
#define mmCRTC4_CRTC_VSYNC_NOM_INT_STATUS 0x438c
#define mmCRTC5_CRTC_VSYNC_NOM_INT_STATUS 0x458c
#define mmCRTC_V_BLANK_START_END 0x1b8d
#define mmCRTC0_CRTC_V_BLANK_START_END 0x1b8d
#define mmCRTC1_CRTC_V_BLANK_START_END 0x1d8d
#define mmCRTC2_CRTC_V_BLANK_START_END 0x1f8d
#define mmCRTC3_CRTC_V_BLANK_START_END 0x418d
#define mmCRTC4_CRTC_V_BLANK_START_END 0x438d
#define mmCRTC5_CRTC_V_BLANK_START_END 0x458d
#define mmCRTC_V_SYNC_A 0x1b8e
#define mmCRTC0_CRTC_V_SYNC_A 0x1b8e
#define mmCRTC1_CRTC_V_SYNC_A 0x1d8e
#define mmCRTC2_CRTC_V_SYNC_A 0x1f8e
#define mmCRTC3_CRTC_V_SYNC_A 0x418e
#define mmCRTC4_CRTC_V_SYNC_A 0x438e
#define mmCRTC5_CRTC_V_SYNC_A 0x458e
#define mmCRTC_V_SYNC_A_CNTL 0x1b8f
#define mmCRTC0_CRTC_V_SYNC_A_CNTL 0x1b8f
#define mmCRTC1_CRTC_V_SYNC_A_CNTL 0x1d8f
#define mmCRTC2_CRTC_V_SYNC_A_CNTL 0x1f8f
#define mmCRTC3_CRTC_V_SYNC_A_CNTL 0x418f
#define mmCRTC4_CRTC_V_SYNC_A_CNTL 0x438f
#define mmCRTC5_CRTC_V_SYNC_A_CNTL 0x458f
#define mmCRTC_V_SYNC_B 0x1b90
#define mmCRTC0_CRTC_V_SYNC_B 0x1b90
#define mmCRTC1_CRTC_V_SYNC_B 0x1d90
#define mmCRTC2_CRTC_V_SYNC_B 0x1f90
#define mmCRTC3_CRTC_V_SYNC_B 0x4190
#define mmCRTC4_CRTC_V_SYNC_B 0x4390
#define mmCRTC5_CRTC_V_SYNC_B 0x4590
#define mmCRTC_V_SYNC_B_CNTL 0x1b91
#define mmCRTC0_CRTC_V_SYNC_B_CNTL 0x1b91
#define mmCRTC1_CRTC_V_SYNC_B_CNTL 0x1d91
#define mmCRTC2_CRTC_V_SYNC_B_CNTL 0x1f91
#define mmCRTC3_CRTC_V_SYNC_B_CNTL 0x4191
#define mmCRTC4_CRTC_V_SYNC_B_CNTL 0x4391
#define mmCRTC5_CRTC_V_SYNC_B_CNTL 0x4591
#define mmCRTC_DTMTEST_CNTL 0x1b92
#define mmCRTC0_CRTC_DTMTEST_CNTL 0x1b92
#define mmCRTC1_CRTC_DTMTEST_CNTL 0x1d92
#define mmCRTC2_CRTC_DTMTEST_CNTL 0x1f92
#define mmCRTC3_CRTC_DTMTEST_CNTL 0x4192
#define mmCRTC4_CRTC_DTMTEST_CNTL 0x4392
#define mmCRTC5_CRTC_DTMTEST_CNTL 0x4592
#define mmCRTC_DTMTEST_STATUS_POSITION 0x1b93
#define mmCRTC0_CRTC_DTMTEST_STATUS_POSITION 0x1b93
#define mmCRTC1_CRTC_DTMTEST_STATUS_POSITION 0x1d93
#define mmCRTC2_CRTC_DTMTEST_STATUS_POSITION 0x1f93
#define mmCRTC3_CRTC_DTMTEST_STATUS_POSITION 0x4193
#define mmCRTC4_CRTC_DTMTEST_STATUS_POSITION 0x4393
#define mmCRTC5_CRTC_DTMTEST_STATUS_POSITION 0x4593
#define mmCRTC_TRIGA_CNTL 0x1b94
#define mmCRTC0_CRTC_TRIGA_CNTL 0x1b94
#define mmCRTC1_CRTC_TRIGA_CNTL 0x1d94
#define mmCRTC2_CRTC_TRIGA_CNTL 0x1f94
#define mmCRTC3_CRTC_TRIGA_CNTL 0x4194
#define mmCRTC4_CRTC_TRIGA_CNTL 0x4394
#define mmCRTC5_CRTC_TRIGA_CNTL 0x4594
#define mmCRTC_TRIGA_MANUAL_TRIG 0x1b95
#define mmCRTC0_CRTC_TRIGA_MANUAL_TRIG 0x1b95
#define mmCRTC1_CRTC_TRIGA_MANUAL_TRIG 0x1d95
#define mmCRTC2_CRTC_TRIGA_MANUAL_TRIG 0x1f95
#define mmCRTC3_CRTC_TRIGA_MANUAL_TRIG 0x4195
#define mmCRTC4_CRTC_TRIGA_MANUAL_TRIG 0x4395
#define mmCRTC5_CRTC_TRIGA_MANUAL_TRIG 0x4595
#define mmCRTC_TRIGB_CNTL 0x1b96
#define mmCRTC0_CRTC_TRIGB_CNTL 0x1b96
#define mmCRTC1_CRTC_TRIGB_CNTL 0x1d96
#define mmCRTC2_CRTC_TRIGB_CNTL 0x1f96
#define mmCRTC3_CRTC_TRIGB_CNTL 0x4196
#define mmCRTC4_CRTC_TRIGB_CNTL 0x4396
#define mmCRTC5_CRTC_TRIGB_CNTL 0x4596
#define mmCRTC_TRIGB_MANUAL_TRIG 0x1b97
#define mmCRTC0_CRTC_TRIGB_MANUAL_TRIG 0x1b97
#define mmCRTC1_CRTC_TRIGB_MANUAL_TRIG 0x1d97
#define mmCRTC2_CRTC_TRIGB_MANUAL_TRIG 0x1f97
#define mmCRTC3_CRTC_TRIGB_MANUAL_TRIG 0x4197
#define mmCRTC4_CRTC_TRIGB_MANUAL_TRIG 0x4397
#define mmCRTC5_CRTC_TRIGB_MANUAL_TRIG 0x4597
#define mmCRTC_FORCE_COUNT_NOW_CNTL 0x1b98
#define mmCRTC0_CRTC_FORCE_COUNT_NOW_CNTL 0x1b98
#define mmCRTC1_CRTC_FORCE_COUNT_NOW_CNTL 0x1d98
#define mmCRTC2_CRTC_FORCE_COUNT_NOW_CNTL 0x1f98
#define mmCRTC3_CRTC_FORCE_COUNT_NOW_CNTL 0x4198
#define mmCRTC4_CRTC_FORCE_COUNT_NOW_CNTL 0x4398
#define mmCRTC5_CRTC_FORCE_COUNT_NOW_CNTL 0x4598
#define mmCRTC_FLOW_CONTROL 0x1b99
#define mmCRTC0_CRTC_FLOW_CONTROL 0x1b99
#define mmCRTC1_CRTC_FLOW_CONTROL 0x1d99
#define mmCRTC2_CRTC_FLOW_CONTROL 0x1f99
#define mmCRTC3_CRTC_FLOW_CONTROL 0x4199
#define mmCRTC4_CRTC_FLOW_CONTROL 0x4399
#define mmCRTC5_CRTC_FLOW_CONTROL 0x4599
#define mmCRTC_STEREO_FORCE_NEXT_EYE 0x1b9a
#define mmCRTC0_CRTC_STEREO_FORCE_NEXT_EYE 0x1b9a
#define mmCRTC1_CRTC_STEREO_FORCE_NEXT_EYE 0x1d9a
#define mmCRTC2_CRTC_STEREO_FORCE_NEXT_EYE 0x1f9a
#define mmCRTC3_CRTC_STEREO_FORCE_NEXT_EYE 0x419a
#define mmCRTC4_CRTC_STEREO_FORCE_NEXT_EYE 0x439a
#define mmCRTC5_CRTC_STEREO_FORCE_NEXT_EYE 0x459a
#define mmCRTC_AVSYNC_COUNTER 0x1b9b
#define mmCRTC0_CRTC_AVSYNC_COUNTER 0x1b9b
#define mmCRTC1_CRTC_AVSYNC_COUNTER 0x1d9b
#define mmCRTC2_CRTC_AVSYNC_COUNTER 0x1f9b
#define mmCRTC3_CRTC_AVSYNC_COUNTER 0x419b
#define mmCRTC4_CRTC_AVSYNC_COUNTER 0x439b
#define mmCRTC5_CRTC_AVSYNC_COUNTER 0x459b
#define mmCRTC_CONTROL 0x1b9c
#define mmCRTC0_CRTC_CONTROL 0x1b9c
#define mmCRTC1_CRTC_CONTROL 0x1d9c
#define mmCRTC2_CRTC_CONTROL 0x1f9c
#define mmCRTC3_CRTC_CONTROL 0x419c
#define mmCRTC4_CRTC_CONTROL 0x439c
#define mmCRTC5_CRTC_CONTROL 0x459c
#define mmCRTC_BLANK_CONTROL 0x1b9d
#define mmCRTC0_CRTC_BLANK_CONTROL 0x1b9d
#define mmCRTC1_CRTC_BLANK_CONTROL 0x1d9d
#define mmCRTC2_CRTC_BLANK_CONTROL 0x1f9d
#define mmCRTC3_CRTC_BLANK_CONTROL 0x419d
#define mmCRTC4_CRTC_BLANK_CONTROL 0x439d
#define mmCRTC5_CRTC_BLANK_CONTROL 0x459d
#define mmCRTC_INTERLACE_CONTROL 0x1b9e
#define mmCRTC0_CRTC_INTERLACE_CONTROL 0x1b9e
#define mmCRTC1_CRTC_INTERLACE_CONTROL 0x1d9e
#define mmCRTC2_CRTC_INTERLACE_CONTROL 0x1f9e
#define mmCRTC3_CRTC_INTERLACE_CONTROL 0x419e
#define mmCRTC4_CRTC_INTERLACE_CONTROL 0x439e
#define mmCRTC5_CRTC_INTERLACE_CONTROL 0x459e
#define mmCRTC_INTERLACE_STATUS 0x1b9f
#define mmCRTC0_CRTC_INTERLACE_STATUS 0x1b9f
#define mmCRTC1_CRTC_INTERLACE_STATUS 0x1d9f
#define mmCRTC2_CRTC_INTERLACE_STATUS 0x1f9f
#define mmCRTC3_CRTC_INTERLACE_STATUS 0x419f
#define mmCRTC4_CRTC_INTERLACE_STATUS 0x439f
#define mmCRTC5_CRTC_INTERLACE_STATUS 0x459f
#define mmCRTC_FIELD_INDICATION_CONTROL 0x1ba0
#define mmCRTC0_CRTC_FIELD_INDICATION_CONTROL 0x1ba0
#define mmCRTC1_CRTC_FIELD_INDICATION_CONTROL 0x1da0
#define mmCRTC2_CRTC_FIELD_INDICATION_CONTROL 0x1fa0
#define mmCRTC3_CRTC_FIELD_INDICATION_CONTROL 0x41a0
#define mmCRTC4_CRTC_FIELD_INDICATION_CONTROL 0x43a0
#define mmCRTC5_CRTC_FIELD_INDICATION_CONTROL 0x45a0
#define mmCRTC_PIXEL_DATA_READBACK0 0x1ba1
#define mmCRTC0_CRTC_PIXEL_DATA_READBACK0 0x1ba1
#define mmCRTC1_CRTC_PIXEL_DATA_READBACK0 0x1da1
#define mmCRTC2_CRTC_PIXEL_DATA_READBACK0 0x1fa1
#define mmCRTC3_CRTC_PIXEL_DATA_READBACK0 0x41a1
#define mmCRTC4_CRTC_PIXEL_DATA_READBACK0 0x43a1
#define mmCRTC5_CRTC_PIXEL_DATA_READBACK0 0x45a1
#define mmCRTC_PIXEL_DATA_READBACK1 0x1ba2
#define mmCRTC0_CRTC_PIXEL_DATA_READBACK1 0x1ba2
#define mmCRTC1_CRTC_PIXEL_DATA_READBACK1 0x1da2
#define mmCRTC2_CRTC_PIXEL_DATA_READBACK1 0x1fa2
#define mmCRTC3_CRTC_PIXEL_DATA_READBACK1 0x41a2
#define mmCRTC4_CRTC_PIXEL_DATA_READBACK1 0x43a2
#define mmCRTC5_CRTC_PIXEL_DATA_READBACK1 0x45a2
#define mmCRTC_STATUS 0x1ba3
#define mmCRTC0_CRTC_STATUS 0x1ba3
#define mmCRTC1_CRTC_STATUS 0x1da3
#define mmCRTC2_CRTC_STATUS 0x1fa3
#define mmCRTC3_CRTC_STATUS 0x41a3
#define mmCRTC4_CRTC_STATUS 0x43a3
#define mmCRTC5_CRTC_STATUS 0x45a3
#define mmCRTC_STATUS_POSITION 0x1ba4
#define mmCRTC0_CRTC_STATUS_POSITION 0x1ba4
#define mmCRTC1_CRTC_STATUS_POSITION 0x1da4
#define mmCRTC2_CRTC_STATUS_POSITION 0x1fa4
#define mmCRTC3_CRTC_STATUS_POSITION 0x41a4
#define mmCRTC4_CRTC_STATUS_POSITION 0x43a4
#define mmCRTC5_CRTC_STATUS_POSITION 0x45a4
#define mmCRTC_NOM_VERT_POSITION 0x1ba5
#define mmCRTC0_CRTC_NOM_VERT_POSITION 0x1ba5
#define mmCRTC1_CRTC_NOM_VERT_POSITION 0x1da5
#define mmCRTC2_CRTC_NOM_VERT_POSITION 0x1fa5
#define mmCRTC3_CRTC_NOM_VERT_POSITION 0x41a5
#define mmCRTC4_CRTC_NOM_VERT_POSITION 0x43a5
#define mmCRTC5_CRTC_NOM_VERT_POSITION 0x45a5
#define mmCRTC_STATUS_FRAME_COUNT 0x1ba6
#define mmCRTC0_CRTC_STATUS_FRAME_COUNT 0x1ba6
#define mmCRTC1_CRTC_STATUS_FRAME_COUNT 0x1da6
#define mmCRTC2_CRTC_STATUS_FRAME_COUNT 0x1fa6
#define mmCRTC3_CRTC_STATUS_FRAME_COUNT 0x41a6
#define mmCRTC4_CRTC_STATUS_FRAME_COUNT 0x43a6
#define mmCRTC5_CRTC_STATUS_FRAME_COUNT 0x45a6
#define mmCRTC_STATUS_VF_COUNT 0x1ba7
#define mmCRTC0_CRTC_STATUS_VF_COUNT 0x1ba7
#define mmCRTC1_CRTC_STATUS_VF_COUNT 0x1da7
#define mmCRTC2_CRTC_STATUS_VF_COUNT 0x1fa7
#define mmCRTC3_CRTC_STATUS_VF_COUNT 0x41a7
#define mmCRTC4_CRTC_STATUS_VF_COUNT 0x43a7
#define mmCRTC5_CRTC_STATUS_VF_COUNT 0x45a7
#define mmCRTC_STATUS_HV_COUNT 0x1ba8
#define mmCRTC0_CRTC_STATUS_HV_COUNT 0x1ba8
#define mmCRTC1_CRTC_STATUS_HV_COUNT 0x1da8
#define mmCRTC2_CRTC_STATUS_HV_COUNT 0x1fa8
#define mmCRTC3_CRTC_STATUS_HV_COUNT 0x41a8
#define mmCRTC4_CRTC_STATUS_HV_COUNT 0x43a8
#define mmCRTC5_CRTC_STATUS_HV_COUNT 0x45a8
#define mmCRTC_COUNT_CONTROL 0x1ba9
#define mmCRTC0_CRTC_COUNT_CONTROL 0x1ba9
#define mmCRTC1_CRTC_COUNT_CONTROL 0x1da9
#define mmCRTC2_CRTC_COUNT_CONTROL 0x1fa9
#define mmCRTC3_CRTC_COUNT_CONTROL 0x41a9
#define mmCRTC4_CRTC_COUNT_CONTROL 0x43a9
#define mmCRTC5_CRTC_COUNT_CONTROL 0x45a9
#define mmCRTC_COUNT_RESET 0x1baa
#define mmCRTC0_CRTC_COUNT_RESET 0x1baa
#define mmCRTC1_CRTC_COUNT_RESET 0x1daa
#define mmCRTC2_CRTC_COUNT_RESET 0x1faa
#define mmCRTC3_CRTC_COUNT_RESET 0x41aa
#define mmCRTC4_CRTC_COUNT_RESET 0x43aa
#define mmCRTC5_CRTC_COUNT_RESET 0x45aa
#define mmCRTC_MANUAL_FORCE_VSYNC_NEXT_LINE 0x1bab
#define mmCRTC0_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE 0x1bab
#define mmCRTC1_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE 0x1dab
#define mmCRTC2_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE 0x1fab
#define mmCRTC3_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE 0x41ab
#define mmCRTC4_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE 0x43ab
#define mmCRTC5_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE 0x45ab
#define mmCRTC_VERT_SYNC_CONTROL 0x1bac
#define mmCRTC0_CRTC_VERT_SYNC_CONTROL 0x1bac
#define mmCRTC1_CRTC_VERT_SYNC_CONTROL 0x1dac
#define mmCRTC2_CRTC_VERT_SYNC_CONTROL 0x1fac
#define mmCRTC3_CRTC_VERT_SYNC_CONTROL 0x41ac
#define mmCRTC4_CRTC_VERT_SYNC_CONTROL 0x43ac
#define mmCRTC5_CRTC_VERT_SYNC_CONTROL 0x45ac
#define mmCRTC_STEREO_STATUS 0x1bad
#define mmCRTC0_CRTC_STEREO_STATUS 0x1bad
#define mmCRTC1_CRTC_STEREO_STATUS 0x1dad
#define mmCRTC2_CRTC_STEREO_STATUS 0x1fad
#define mmCRTC3_CRTC_STEREO_STATUS 0x41ad
#define mmCRTC4_CRTC_STEREO_STATUS 0x43ad
#define mmCRTC5_CRTC_STEREO_STATUS 0x45ad
#define mmCRTC_STEREO_CONTROL 0x1bae
#define mmCRTC0_CRTC_STEREO_CONTROL 0x1bae
#define mmCRTC1_CRTC_STEREO_CONTROL 0x1dae
#define mmCRTC2_CRTC_STEREO_CONTROL 0x1fae
#define mmCRTC3_CRTC_STEREO_CONTROL 0x41ae
#define mmCRTC4_CRTC_STEREO_CONTROL 0x43ae
#define mmCRTC5_CRTC_STEREO_CONTROL 0x45ae
#define mmCRTC_SNAPSHOT_STATUS 0x1baf
#define mmCRTC0_CRTC_SNAPSHOT_STATUS 0x1baf
#define mmCRTC1_CRTC_SNAPSHOT_STATUS 0x1daf
#define mmCRTC2_CRTC_SNAPSHOT_STATUS 0x1faf
#define mmCRTC3_CRTC_SNAPSHOT_STATUS 0x41af
#define mmCRTC4_CRTC_SNAPSHOT_STATUS 0x43af
#define mmCRTC5_CRTC_SNAPSHOT_STATUS 0x45af
#define mmCRTC_SNAPSHOT_CONTROL 0x1bb0
#define mmCRTC0_CRTC_SNAPSHOT_CONTROL 0x1bb0
#define mmCRTC1_CRTC_SNAPSHOT_CONTROL 0x1db0
#define mmCRTC2_CRTC_SNAPSHOT_CONTROL 0x1fb0
#define mmCRTC3_CRTC_SNAPSHOT_CONTROL 0x41b0
#define mmCRTC4_CRTC_SNAPSHOT_CONTROL 0x43b0
#define mmCRTC5_CRTC_SNAPSHOT_CONTROL 0x45b0
#define mmCRTC_SNAPSHOT_POSITION 0x1bb1
#define mmCRTC0_CRTC_SNAPSHOT_POSITION 0x1bb1
#define mmCRTC1_CRTC_SNAPSHOT_POSITION 0x1db1
#define mmCRTC2_CRTC_SNAPSHOT_POSITION 0x1fb1
#define mmCRTC3_CRTC_SNAPSHOT_POSITION 0x41b1
#define mmCRTC4_CRTC_SNAPSHOT_POSITION 0x43b1
#define mmCRTC5_CRTC_SNAPSHOT_POSITION 0x45b1
#define mmCRTC_SNAPSHOT_FRAME 0x1bb2
#define mmCRTC0_CRTC_SNAPSHOT_FRAME 0x1bb2
#define mmCRTC1_CRTC_SNAPSHOT_FRAME 0x1db2
#define mmCRTC2_CRTC_SNAPSHOT_FRAME 0x1fb2
#define mmCRTC3_CRTC_SNAPSHOT_FRAME 0x41b2
#define mmCRTC4_CRTC_SNAPSHOT_FRAME 0x43b2
#define mmCRTC5_CRTC_SNAPSHOT_FRAME 0x45b2
#define mmCRTC_START_LINE_CONTROL 0x1bb3
#define mmCRTC0_CRTC_START_LINE_CONTROL 0x1bb3
#define mmCRTC1_CRTC_START_LINE_CONTROL 0x1db3
#define mmCRTC2_CRTC_START_LINE_CONTROL 0x1fb3
#define mmCRTC3_CRTC_START_LINE_CONTROL 0x41b3
#define mmCRTC4_CRTC_START_LINE_CONTROL 0x43b3
#define mmCRTC5_CRTC_START_LINE_CONTROL 0x45b3
#define mmCRTC_INTERRUPT_CONTROL 0x1bb4
#define mmCRTC0_CRTC_INTERRUPT_CONTROL 0x1bb4
#define mmCRTC1_CRTC_INTERRUPT_CONTROL 0x1db4
#define mmCRTC2_CRTC_INTERRUPT_CONTROL 0x1fb4
#define mmCRTC3_CRTC_INTERRUPT_CONTROL 0x41b4
#define mmCRTC4_CRTC_INTERRUPT_CONTROL 0x43b4
#define mmCRTC5_CRTC_INTERRUPT_CONTROL 0x45b4
#define mmCRTC_UPDATE_LOCK 0x1bb5
#define mmCRTC0_CRTC_UPDATE_LOCK 0x1bb5
#define mmCRTC1_CRTC_UPDATE_LOCK 0x1db5
#define mmCRTC2_CRTC_UPDATE_LOCK 0x1fb5
#define mmCRTC3_CRTC_UPDATE_LOCK 0x41b5
#define mmCRTC4_CRTC_UPDATE_LOCK 0x43b5
#define mmCRTC5_CRTC_UPDATE_LOCK 0x45b5
#define mmCRTC_DOUBLE_BUFFER_CONTROL 0x1bb6
#define mmCRTC0_CRTC_DOUBLE_BUFFER_CONTROL 0x1bb6
#define mmCRTC1_CRTC_DOUBLE_BUFFER_CONTROL 0x1db6
#define mmCRTC2_CRTC_DOUBLE_BUFFER_CONTROL 0x1fb6
#define mmCRTC3_CRTC_DOUBLE_BUFFER_CONTROL 0x41b6
#define mmCRTC4_CRTC_DOUBLE_BUFFER_CONTROL 0x43b6
#define mmCRTC5_CRTC_DOUBLE_BUFFER_CONTROL 0x45b6
#define mmCRTC_VGA_PARAMETER_CAPTURE_MODE 0x1bb7
#define mmCRTC0_CRTC_VGA_PARAMETER_CAPTURE_MODE 0x1bb7
#define mmCRTC1_CRTC_VGA_PARAMETER_CAPTURE_MODE 0x1db7
#define mmCRTC2_CRTC_VGA_PARAMETER_CAPTURE_MODE 0x1fb7
#define mmCRTC3_CRTC_VGA_PARAMETER_CAPTURE_MODE 0x41b7
#define mmCRTC4_CRTC_VGA_PARAMETER_CAPTURE_MODE 0x43b7
#define mmCRTC5_CRTC_VGA_PARAMETER_CAPTURE_MODE 0x45b7
#define mmCRTC_TEST_PATTERN_CONTROL 0x1bba
#define mmCRTC0_CRTC_TEST_PATTERN_CONTROL 0x1bba
#define mmCRTC1_CRTC_TEST_PATTERN_CONTROL 0x1dba
#define mmCRTC2_CRTC_TEST_PATTERN_CONTROL 0x1fba
#define mmCRTC3_CRTC_TEST_PATTERN_CONTROL 0x41ba
#define mmCRTC4_CRTC_TEST_PATTERN_CONTROL 0x43ba
#define mmCRTC5_CRTC_TEST_PATTERN_CONTROL 0x45ba
#define mmCRTC_TEST_PATTERN_PARAMETERS 0x1bbb
#define mmCRTC0_CRTC_TEST_PATTERN_PARAMETERS 0x1bbb
#define mmCRTC1_CRTC_TEST_PATTERN_PARAMETERS 0x1dbb
#define mmCRTC2_CRTC_TEST_PATTERN_PARAMETERS 0x1fbb
#define mmCRTC3_CRTC_TEST_PATTERN_PARAMETERS 0x41bb
#define mmCRTC4_CRTC_TEST_PATTERN_PARAMETERS 0x43bb
#define mmCRTC5_CRTC_TEST_PATTERN_PARAMETERS 0x45bb
#define mmCRTC_TEST_PATTERN_COLOR 0x1bbc
#define mmCRTC0_CRTC_TEST_PATTERN_COLOR 0x1bbc
#define mmCRTC1_CRTC_TEST_PATTERN_COLOR 0x1dbc
#define mmCRTC2_CRTC_TEST_PATTERN_COLOR 0x1fbc
#define mmCRTC3_CRTC_TEST_PATTERN_COLOR 0x41bc
#define mmCRTC4_CRTC_TEST_PATTERN_COLOR 0x43bc
#define mmCRTC5_CRTC_TEST_PATTERN_COLOR 0x45bc
#define mmCRTC_MASTER_UPDATE_LOCK 0x1bbd
#define mmCRTC0_CRTC_MASTER_UPDATE_LOCK 0x1bbd
#define mmCRTC1_CRTC_MASTER_UPDATE_LOCK 0x1dbd
#define mmCRTC2_CRTC_MASTER_UPDATE_LOCK 0x1fbd
#define mmCRTC3_CRTC_MASTER_UPDATE_LOCK 0x41bd
#define mmCRTC4_CRTC_MASTER_UPDATE_LOCK 0x43bd
#define mmCRTC5_CRTC_MASTER_UPDATE_LOCK 0x45bd
#define mmCRTC_MASTER_UPDATE_MODE 0x1bbe
#define mmCRTC0_CRTC_MASTER_UPDATE_MODE 0x1bbe
#define mmCRTC1_CRTC_MASTER_UPDATE_MODE 0x1dbe
#define mmCRTC2_CRTC_MASTER_UPDATE_MODE 0x1fbe
#define mmCRTC3_CRTC_MASTER_UPDATE_MODE 0x41be
#define mmCRTC4_CRTC_MASTER_UPDATE_MODE 0x43be
#define mmCRTC5_CRTC_MASTER_UPDATE_MODE 0x45be
#define mmCRTC_MVP_INBAND_CNTL_INSERT 0x1bbf
#define mmCRTC0_CRTC_MVP_INBAND_CNTL_INSERT 0x1bbf
#define mmCRTC1_CRTC_MVP_INBAND_CNTL_INSERT 0x1dbf
#define mmCRTC2_CRTC_MVP_INBAND_CNTL_INSERT 0x1fbf
#define mmCRTC3_CRTC_MVP_INBAND_CNTL_INSERT 0x41bf
#define mmCRTC4_CRTC_MVP_INBAND_CNTL_INSERT 0x43bf
#define mmCRTC5_CRTC_MVP_INBAND_CNTL_INSERT 0x45bf
#define mmCRTC_MVP_INBAND_CNTL_INSERT_TIMER 0x1bc0
#define mmCRTC0_CRTC_MVP_INBAND_CNTL_INSERT_TIMER 0x1bc0
#define mmCRTC1_CRTC_MVP_INBAND_CNTL_INSERT_TIMER 0x1dc0
#define mmCRTC2_CRTC_MVP_INBAND_CNTL_INSERT_TIMER 0x1fc0
#define mmCRTC3_CRTC_MVP_INBAND_CNTL_INSERT_TIMER 0x41c0
#define mmCRTC4_CRTC_MVP_INBAND_CNTL_INSERT_TIMER 0x43c0
#define mmCRTC5_CRTC_MVP_INBAND_CNTL_INSERT_TIMER 0x45c0
#define mmCRTC_MVP_STATUS 0x1bc1
#define mmCRTC0_CRTC_MVP_STATUS 0x1bc1
#define mmCRTC1_CRTC_MVP_STATUS 0x1dc1
#define mmCRTC2_CRTC_MVP_STATUS 0x1fc1
#define mmCRTC3_CRTC_MVP_STATUS 0x41c1
#define mmCRTC4_CRTC_MVP_STATUS 0x43c1
#define mmCRTC5_CRTC_MVP_STATUS 0x45c1
#define mmCRTC_MASTER_EN 0x1bc2
#define mmCRTC0_CRTC_MASTER_EN 0x1bc2
#define mmCRTC1_CRTC_MASTER_EN 0x1dc2
#define mmCRTC2_CRTC_MASTER_EN 0x1fc2
#define mmCRTC3_CRTC_MASTER_EN 0x41c2
#define mmCRTC4_CRTC_MASTER_EN 0x43c2
#define mmCRTC5_CRTC_MASTER_EN 0x45c2
#define mmCRTC_ALLOW_STOP_OFF_V_CNT 0x1bc3
#define mmCRTC0_CRTC_ALLOW_STOP_OFF_V_CNT 0x1bc3
#define mmCRTC1_CRTC_ALLOW_STOP_OFF_V_CNT 0x1dc3
#define mmCRTC2_CRTC_ALLOW_STOP_OFF_V_CNT 0x1fc3
#define mmCRTC3_CRTC_ALLOW_STOP_OFF_V_CNT 0x41c3
#define mmCRTC4_CRTC_ALLOW_STOP_OFF_V_CNT 0x43c3
#define mmCRTC5_CRTC_ALLOW_STOP_OFF_V_CNT 0x45c3
#define mmCRTC_V_UPDATE_INT_STATUS 0x1bc4
#define mmCRTC0_CRTC_V_UPDATE_INT_STATUS 0x1bc4
#define mmCRTC1_CRTC_V_UPDATE_INT_STATUS 0x1dc4
#define mmCRTC2_CRTC_V_UPDATE_INT_STATUS 0x1fc4
#define mmCRTC3_CRTC_V_UPDATE_INT_STATUS 0x41c4
#define mmCRTC4_CRTC_V_UPDATE_INT_STATUS 0x43c4
#define mmCRTC5_CRTC_V_UPDATE_INT_STATUS 0x45c4
#define mmCRTC_OVERSCAN_COLOR 0x1bc8
#define mmCRTC0_CRTC_OVERSCAN_COLOR 0x1bc8
#define mmCRTC1_CRTC_OVERSCAN_COLOR 0x1dc8
#define mmCRTC2_CRTC_OVERSCAN_COLOR 0x1fc8
#define mmCRTC3_CRTC_OVERSCAN_COLOR 0x41c8
#define mmCRTC4_CRTC_OVERSCAN_COLOR 0x43c8
#define mmCRTC5_CRTC_OVERSCAN_COLOR 0x45c8
#define mmCRTC_OVERSCAN_COLOR_EXT 0x1bc9
#define mmCRTC0_CRTC_OVERSCAN_COLOR_EXT 0x1bc9
#define mmCRTC1_CRTC_OVERSCAN_COLOR_EXT 0x1dc9
#define mmCRTC2_CRTC_OVERSCAN_COLOR_EXT 0x1fc9
#define mmCRTC3_CRTC_OVERSCAN_COLOR_EXT 0x41c9
#define mmCRTC4_CRTC_OVERSCAN_COLOR_EXT 0x43c9
#define mmCRTC5_CRTC_OVERSCAN_COLOR_EXT 0x45c9
#define mmCRTC_BLANK_DATA_COLOR 0x1bca
#define mmCRTC0_CRTC_BLANK_DATA_COLOR 0x1bca
#define mmCRTC1_CRTC_BLANK_DATA_COLOR 0x1dca
#define mmCRTC2_CRTC_BLANK_DATA_COLOR 0x1fca
#define mmCRTC3_CRTC_BLANK_DATA_COLOR 0x41ca
#define mmCRTC4_CRTC_BLANK_DATA_COLOR 0x43ca
#define mmCRTC5_CRTC_BLANK_DATA_COLOR 0x45ca
#define mmCRTC_BLANK_DATA_COLOR_EXT 0x1bcb
#define mmCRTC0_CRTC_BLANK_DATA_COLOR_EXT 0x1bcb
#define mmCRTC1_CRTC_BLANK_DATA_COLOR_EXT 0x1dcb
#define mmCRTC2_CRTC_BLANK_DATA_COLOR_EXT 0x1fcb
#define mmCRTC3_CRTC_BLANK_DATA_COLOR_EXT 0x41cb
#define mmCRTC4_CRTC_BLANK_DATA_COLOR_EXT 0x43cb
#define mmCRTC5_CRTC_BLANK_DATA_COLOR_EXT 0x45cb
#define mmCRTC_BLACK_COLOR 0x1bcc
#define mmCRTC0_CRTC_BLACK_COLOR 0x1bcc
#define mmCRTC1_CRTC_BLACK_COLOR 0x1dcc
#define mmCRTC2_CRTC_BLACK_COLOR 0x1fcc
#define mmCRTC3_CRTC_BLACK_COLOR 0x41cc
#define mmCRTC4_CRTC_BLACK_COLOR 0x43cc
#define mmCRTC5_CRTC_BLACK_COLOR 0x45cc
#define mmCRTC_BLACK_COLOR_EXT 0x1bcd
#define mmCRTC0_CRTC_BLACK_COLOR_EXT 0x1bcd
#define mmCRTC1_CRTC_BLACK_COLOR_EXT 0x1dcd
#define mmCRTC2_CRTC_BLACK_COLOR_EXT 0x1fcd
#define mmCRTC3_CRTC_BLACK_COLOR_EXT 0x41cd
#define mmCRTC4_CRTC_BLACK_COLOR_EXT 0x43cd
#define mmCRTC5_CRTC_BLACK_COLOR_EXT 0x45cd
#define mmCRTC_VERTICAL_INTERRUPT0_POSITION 0x1bce
#define mmCRTC0_CRTC_VERTICAL_INTERRUPT0_POSITION 0x1bce
#define mmCRTC1_CRTC_VERTICAL_INTERRUPT0_POSITION 0x1dce
#define mmCRTC2_CRTC_VERTICAL_INTERRUPT0_POSITION 0x1fce
#define mmCRTC3_CRTC_VERTICAL_INTERRUPT0_POSITION 0x41ce
#define mmCRTC4_CRTC_VERTICAL_INTERRUPT0_POSITION 0x43ce
#define mmCRTC5_CRTC_VERTICAL_INTERRUPT0_POSITION 0x45ce
#define mmCRTC_VERTICAL_INTERRUPT0_CONTROL 0x1bcf
#define mmCRTC0_CRTC_VERTICAL_INTERRUPT0_CONTROL 0x1bcf
#define mmCRTC1_CRTC_VERTICAL_INTERRUPT0_CONTROL 0x1dcf
#define mmCRTC2_CRTC_VERTICAL_INTERRUPT0_CONTROL 0x1fcf
#define mmCRTC3_CRTC_VERTICAL_INTERRUPT0_CONTROL 0x41cf
#define mmCRTC4_CRTC_VERTICAL_INTERRUPT0_CONTROL 0x43cf
#define mmCRTC5_CRTC_VERTICAL_INTERRUPT0_CONTROL 0x45cf
#define mmCRTC_VERTICAL_INTERRUPT1_POSITION 0x1bd0
#define mmCRTC0_CRTC_VERTICAL_INTERRUPT1_POSITION 0x1bd0
#define mmCRTC1_CRTC_VERTICAL_INTERRUPT1_POSITION 0x1dd0
#define mmCRTC2_CRTC_VERTICAL_INTERRUPT1_POSITION 0x1fd0
#define mmCRTC3_CRTC_VERTICAL_INTERRUPT1_POSITION 0x41d0
#define mmCRTC4_CRTC_VERTICAL_INTERRUPT1_POSITION 0x43d0
#define mmCRTC5_CRTC_VERTICAL_INTERRUPT1_POSITION 0x45d0
#define mmCRTC_VERTICAL_INTERRUPT1_CONTROL 0x1bd1
#define mmCRTC0_CRTC_VERTICAL_INTERRUPT1_CONTROL 0x1bd1
#define mmCRTC1_CRTC_VERTICAL_INTERRUPT1_CONTROL 0x1dd1
#define mmCRTC2_CRTC_VERTICAL_INTERRUPT1_CONTROL 0x1fd1
#define mmCRTC3_CRTC_VERTICAL_INTERRUPT1_CONTROL 0x41d1
#define mmCRTC4_CRTC_VERTICAL_INTERRUPT1_CONTROL 0x43d1
#define mmCRTC5_CRTC_VERTICAL_INTERRUPT1_CONTROL 0x45d1
#define mmCRTC_VERTICAL_INTERRUPT2_POSITION 0x1bd2
#define mmCRTC0_CRTC_VERTICAL_INTERRUPT2_POSITION 0x1bd2
#define mmCRTC1_CRTC_VERTICAL_INTERRUPT2_POSITION 0x1dd2
#define mmCRTC2_CRTC_VERTICAL_INTERRUPT2_POSITION 0x1fd2
#define mmCRTC3_CRTC_VERTICAL_INTERRUPT2_POSITION 0x41d2
#define mmCRTC4_CRTC_VERTICAL_INTERRUPT2_POSITION 0x43d2
#define mmCRTC5_CRTC_VERTICAL_INTERRUPT2_POSITION 0x45d2
#define mmCRTC_VERTICAL_INTERRUPT2_CONTROL 0x1bd3
#define mmCRTC0_CRTC_VERTICAL_INTERRUPT2_CONTROL 0x1bd3
#define mmCRTC1_CRTC_VERTICAL_INTERRUPT2_CONTROL 0x1dd3
#define mmCRTC2_CRTC_VERTICAL_INTERRUPT2_CONTROL 0x1fd3
#define mmCRTC3_CRTC_VERTICAL_INTERRUPT2_CONTROL 0x41d3
#define mmCRTC4_CRTC_VERTICAL_INTERRUPT2_CONTROL 0x43d3
#define mmCRTC5_CRTC_VERTICAL_INTERRUPT2_CONTROL 0x45d3
#define mmCRTC_CRC_CNTL 0x1bd4
#define mmCRTC0_CRTC_CRC_CNTL 0x1bd4
#define mmCRTC1_CRTC_CRC_CNTL 0x1dd4
#define mmCRTC2_CRTC_CRC_CNTL 0x1fd4
#define mmCRTC3_CRTC_CRC_CNTL 0x41d4
#define mmCRTC4_CRTC_CRC_CNTL 0x43d4
#define mmCRTC5_CRTC_CRC_CNTL 0x45d4
#define mmCRTC_CRC0_WINDOWA_X_CONTROL 0x1bd5
#define mmCRTC0_CRTC_CRC0_WINDOWA_X_CONTROL 0x1bd5
#define mmCRTC1_CRTC_CRC0_WINDOWA_X_CONTROL 0x1dd5
#define mmCRTC2_CRTC_CRC0_WINDOWA_X_CONTROL 0x1fd5
#define mmCRTC3_CRTC_CRC0_WINDOWA_X_CONTROL 0x41d5
#define mmCRTC4_CRTC_CRC0_WINDOWA_X_CONTROL 0x43d5
#define mmCRTC5_CRTC_CRC0_WINDOWA_X_CONTROL 0x45d5
#define mmCRTC_CRC0_WINDOWA_Y_CONTROL 0x1bd6
#define mmCRTC0_CRTC_CRC0_WINDOWA_Y_CONTROL 0x1bd6
#define mmCRTC1_CRTC_CRC0_WINDOWA_Y_CONTROL 0x1dd6
#define mmCRTC2_CRTC_CRC0_WINDOWA_Y_CONTROL 0x1fd6
#define mmCRTC3_CRTC_CRC0_WINDOWA_Y_CONTROL 0x41d6
#define mmCRTC4_CRTC_CRC0_WINDOWA_Y_CONTROL 0x43d6
#define mmCRTC5_CRTC_CRC0_WINDOWA_Y_CONTROL 0x45d6
#define mmCRTC_CRC0_WINDOWB_X_CONTROL 0x1bd7
#define mmCRTC0_CRTC_CRC0_WINDOWB_X_CONTROL 0x1bd7
#define mmCRTC1_CRTC_CRC0_WINDOWB_X_CONTROL 0x1dd7
#define mmCRTC2_CRTC_CRC0_WINDOWB_X_CONTROL 0x1fd7
#define mmCRTC3_CRTC_CRC0_WINDOWB_X_CONTROL 0x41d7
#define mmCRTC4_CRTC_CRC0_WINDOWB_X_CONTROL 0x43d7
#define mmCRTC5_CRTC_CRC0_WINDOWB_X_CONTROL 0x45d7
#define mmCRTC_CRC0_WINDOWB_Y_CONTROL 0x1bd8
#define mmCRTC0_CRTC_CRC0_WINDOWB_Y_CONTROL 0x1bd8
#define mmCRTC1_CRTC_CRC0_WINDOWB_Y_CONTROL 0x1dd8
#define mmCRTC2_CRTC_CRC0_WINDOWB_Y_CONTROL 0x1fd8
#define mmCRTC3_CRTC_CRC0_WINDOWB_Y_CONTROL 0x41d8
#define mmCRTC4_CRTC_CRC0_WINDOWB_Y_CONTROL 0x43d8
#define mmCRTC5_CRTC_CRC0_WINDOWB_Y_CONTROL 0x45d8
#define mmCRTC_CRC0_DATA_RG 0x1bd9
#define mmCRTC0_CRTC_CRC0_DATA_RG 0x1bd9
#define mmCRTC1_CRTC_CRC0_DATA_RG 0x1dd9
#define mmCRTC2_CRTC_CRC0_DATA_RG 0x1fd9
#define mmCRTC3_CRTC_CRC0_DATA_RG 0x41d9
#define mmCRTC4_CRTC_CRC0_DATA_RG 0x43d9
#define mmCRTC5_CRTC_CRC0_DATA_RG 0x45d9
#define mmCRTC_CRC0_DATA_B 0x1bda
#define mmCRTC0_CRTC_CRC0_DATA_B 0x1bda
#define mmCRTC1_CRTC_CRC0_DATA_B 0x1dda
#define mmCRTC2_CRTC_CRC0_DATA_B 0x1fda
#define mmCRTC3_CRTC_CRC0_DATA_B 0x41da
#define mmCRTC4_CRTC_CRC0_DATA_B 0x43da
#define mmCRTC5_CRTC_CRC0_DATA_B 0x45da
#define mmCRTC_CRC1_WINDOWA_X_CONTROL 0x1bdb
#define mmCRTC0_CRTC_CRC1_WINDOWA_X_CONTROL 0x1bdb
#define mmCRTC1_CRTC_CRC1_WINDOWA_X_CONTROL 0x1ddb
#define mmCRTC2_CRTC_CRC1_WINDOWA_X_CONTROL 0x1fdb
#define mmCRTC3_CRTC_CRC1_WINDOWA_X_CONTROL 0x41db
#define mmCRTC4_CRTC_CRC1_WINDOWA_X_CONTROL 0x43db
#define mmCRTC5_CRTC_CRC1_WINDOWA_X_CONTROL 0x45db
#define mmCRTC_CRC1_WINDOWA_Y_CONTROL 0x1bdc
#define mmCRTC0_CRTC_CRC1_WINDOWA_Y_CONTROL 0x1bdc
#define mmCRTC1_CRTC_CRC1_WINDOWA_Y_CONTROL 0x1ddc
#define mmCRTC2_CRTC_CRC1_WINDOWA_Y_CONTROL 0x1fdc
#define mmCRTC3_CRTC_CRC1_WINDOWA_Y_CONTROL 0x41dc
#define mmCRTC4_CRTC_CRC1_WINDOWA_Y_CONTROL 0x43dc
#define mmCRTC5_CRTC_CRC1_WINDOWA_Y_CONTROL 0x45dc
#define mmCRTC_CRC1_WINDOWB_X_CONTROL 0x1bdd
#define mmCRTC0_CRTC_CRC1_WINDOWB_X_CONTROL 0x1bdd
#define mmCRTC1_CRTC_CRC1_WINDOWB_X_CONTROL 0x1ddd
#define mmCRTC2_CRTC_CRC1_WINDOWB_X_CONTROL 0x1fdd
#define mmCRTC3_CRTC_CRC1_WINDOWB_X_CONTROL 0x41dd
#define mmCRTC4_CRTC_CRC1_WINDOWB_X_CONTROL 0x43dd
#define mmCRTC5_CRTC_CRC1_WINDOWB_X_CONTROL 0x45dd
#define mmCRTC_CRC1_WINDOWB_Y_CONTROL 0x1bde
#define mmCRTC0_CRTC_CRC1_WINDOWB_Y_CONTROL 0x1bde
#define mmCRTC1_CRTC_CRC1_WINDOWB_Y_CONTROL 0x1dde
#define mmCRTC2_CRTC_CRC1_WINDOWB_Y_CONTROL 0x1fde
#define mmCRTC3_CRTC_CRC1_WINDOWB_Y_CONTROL 0x41de
#define mmCRTC4_CRTC_CRC1_WINDOWB_Y_CONTROL 0x43de
#define mmCRTC5_CRTC_CRC1_WINDOWB_Y_CONTROL 0x45de
#define mmCRTC_CRC1_DATA_RG 0x1bdf
#define mmCRTC0_CRTC_CRC1_DATA_RG 0x1bdf
#define mmCRTC1_CRTC_CRC1_DATA_RG 0x1ddf
#define mmCRTC2_CRTC_CRC1_DATA_RG 0x1fdf
#define mmCRTC3_CRTC_CRC1_DATA_RG 0x41df
#define mmCRTC4_CRTC_CRC1_DATA_RG 0x43df
#define mmCRTC5_CRTC_CRC1_DATA_RG 0x45df
#define mmCRTC_CRC1_DATA_B 0x1be0
#define mmCRTC0_CRTC_CRC1_DATA_B 0x1be0
#define mmCRTC1_CRTC_CRC1_DATA_B 0x1de0
#define mmCRTC2_CRTC_CRC1_DATA_B 0x1fe0
#define mmCRTC3_CRTC_CRC1_DATA_B 0x41e0
#define mmCRTC4_CRTC_CRC1_DATA_B 0x43e0
#define mmCRTC5_CRTC_CRC1_DATA_B 0x45e0
#define mmCRTC_STATIC_SCREEN_CONTROL 0x1be7
#define mmCRTC0_CRTC_STATIC_SCREEN_CONTROL 0x1be7
#define mmCRTC1_CRTC_STATIC_SCREEN_CONTROL 0x1de7
#define mmCRTC2_CRTC_STATIC_SCREEN_CONTROL 0x1fe7
#define mmCRTC3_CRTC_STATIC_SCREEN_CONTROL 0x41e7
#define mmCRTC4_CRTC_STATIC_SCREEN_CONTROL 0x43e7
#define mmCRTC5_CRTC_STATIC_SCREEN_CONTROL 0x45e7
#define mmCRTC_3D_STRUCTURE_CONTROL 0x1b78
#define mmCRTC0_CRTC_3D_STRUCTURE_CONTROL 0x1b78
#define mmCRTC1_CRTC_3D_STRUCTURE_CONTROL 0x1d78
#define mmCRTC2_CRTC_3D_STRUCTURE_CONTROL 0x1f78
#define mmCRTC3_CRTC_3D_STRUCTURE_CONTROL 0x4178
#define mmCRTC4_CRTC_3D_STRUCTURE_CONTROL 0x4378
#define mmCRTC5_CRTC_3D_STRUCTURE_CONTROL 0x4578
#define mmCRTC_GSL_VSYNC_GAP 0x1b79
#define mmCRTC0_CRTC_GSL_VSYNC_GAP 0x1b79
#define mmCRTC1_CRTC_GSL_VSYNC_GAP 0x1d79
#define mmCRTC2_CRTC_GSL_VSYNC_GAP 0x1f79
#define mmCRTC3_CRTC_GSL_VSYNC_GAP 0x4179
#define mmCRTC4_CRTC_GSL_VSYNC_GAP 0x4379
#define mmCRTC5_CRTC_GSL_VSYNC_GAP 0x4579
#define mmCRTC_GSL_WINDOW 0x1b7a
#define mmCRTC0_CRTC_GSL_WINDOW 0x1b7a
#define mmCRTC1_CRTC_GSL_WINDOW 0x1d7a
#define mmCRTC2_CRTC_GSL_WINDOW 0x1f7a
#define mmCRTC3_CRTC_GSL_WINDOW 0x417a
#define mmCRTC4_CRTC_GSL_WINDOW 0x437a
#define mmCRTC5_CRTC_GSL_WINDOW 0x457a
#define mmCRTC_GSL_CONTROL 0x1b7b
#define mmCRTC0_CRTC_GSL_CONTROL 0x1b7b
#define mmCRTC1_CRTC_GSL_CONTROL 0x1d7b
#define mmCRTC2_CRTC_GSL_CONTROL 0x1f7b
#define mmCRTC3_CRTC_GSL_CONTROL 0x417b
#define mmCRTC4_CRTC_GSL_CONTROL 0x437b
#define mmCRTC5_CRTC_GSL_CONTROL 0x457b
#define mmCRTC_TEST_DEBUG_INDEX 0x1bc6
#define mmCRTC0_CRTC_TEST_DEBUG_INDEX 0x1bc6
#define mmCRTC1_CRTC_TEST_DEBUG_INDEX 0x1dc6
#define mmCRTC2_CRTC_TEST_DEBUG_INDEX 0x1fc6
#define mmCRTC3_CRTC_TEST_DEBUG_INDEX 0x41c6
#define mmCRTC4_CRTC_TEST_DEBUG_INDEX 0x43c6
#define mmCRTC5_CRTC_TEST_DEBUG_INDEX 0x45c6
#define mmCRTC_TEST_DEBUG_DATA 0x1bc7
#define mmCRTC0_CRTC_TEST_DEBUG_DATA 0x1bc7
#define mmCRTC1_CRTC_TEST_DEBUG_DATA 0x1dc7
#define mmCRTC2_CRTC_TEST_DEBUG_DATA 0x1fc7
#define mmCRTC3_CRTC_TEST_DEBUG_DATA 0x41c7
#define mmCRTC4_CRTC_TEST_DEBUG_DATA 0x43c7
#define mmCRTC5_CRTC_TEST_DEBUG_DATA 0x45c7
#define mmDAC_ENABLE 0x16aa
#define mmDAC_SOURCE_SELECT 0x16ab
#define mmDAC_CRC_EN 0x16ac
#define mmDAC_CRC_CONTROL 0x16ad
#define mmDAC_CRC_SIG_RGB_MASK 0x16ae
#define mmDAC_CRC_SIG_CONTROL_MASK 0x16af
#define mmDAC_CRC_SIG_RGB 0x16b0
#define mmDAC_CRC_SIG_CONTROL 0x16b1
#define mmDAC_SYNC_TRISTATE_CONTROL 0x16b2
#define mmDAC_STEREOSYNC_SELECT 0x16b3
#define mmDAC_AUTODETECT_CONTROL 0x16b4
#define mmDAC_AUTODETECT_CONTROL2 0x16b5
#define mmDAC_AUTODETECT_CONTROL3 0x16b6
#define mmDAC_AUTODETECT_STATUS 0x16b7
#define mmDAC_AUTODETECT_INT_CONTROL 0x16b8
#define mmDAC_FORCE_OUTPUT_CNTL 0x16b9
#define mmDAC_FORCE_DATA 0x16ba
#define mmDAC_POWERDOWN 0x16bb
#define mmDAC_CONTROL 0x16bc
#define mmDAC_COMPARATOR_ENABLE 0x16bd
#define mmDAC_COMPARATOR_OUTPUT 0x16be
#define mmDAC_PWR_CNTL 0x16bf
#define mmDAC_DFT_CONFIG 0x16c0
#define mmDAC_FIFO_STATUS 0x16c1
#define mmDAC_TEST_DEBUG_INDEX 0x16c2
#define mmDAC_TEST_DEBUG_DATA 0x16c3
#define mmPERFCOUNTER_CNTL 0x170
#define mmDC_PERFMON0_PERFCOUNTER_CNTL 0x170
#define mmDC_PERFMON1_PERFCOUNTER_CNTL 0x364
#define mmDC_PERFMON2_PERFCOUNTER_CNTL 0x18c8
#define mmDC_PERFMON3_PERFCOUNTER_CNTL 0x1b24
#define mmDC_PERFMON4_PERFCOUNTER_CNTL 0x1d24
#define mmDC_PERFMON5_PERFCOUNTER_CNTL 0x1f24
#define mmDC_PERFMON6_PERFCOUNTER_CNTL 0x4124
#define mmDC_PERFMON7_PERFCOUNTER_CNTL 0x4324
#define mmDC_PERFMON8_PERFCOUNTER_CNTL 0x4524
#define mmDC_PERFMON9_PERFCOUNTER_CNTL 0x4724
#define mmDC_PERFMON10_PERFCOUNTER_CNTL 0x59a0
#define mmDC_PERFMON11_PERFCOUNTER_CNTL 0x5f68
#define mmPERFCOUNTER_STATE 0x171
#define mmDC_PERFMON0_PERFCOUNTER_STATE 0x171
#define mmDC_PERFMON1_PERFCOUNTER_STATE 0x365
#define mmDC_PERFMON2_PERFCOUNTER_STATE 0x18c9
#define mmDC_PERFMON3_PERFCOUNTER_STATE 0x1b25
#define mmDC_PERFMON4_PERFCOUNTER_STATE 0x1d25
#define mmDC_PERFMON5_PERFCOUNTER_STATE 0x1f25
#define mmDC_PERFMON6_PERFCOUNTER_STATE 0x4125
#define mmDC_PERFMON7_PERFCOUNTER_STATE 0x4325
#define mmDC_PERFMON8_PERFCOUNTER_STATE 0x4525
#define mmDC_PERFMON9_PERFCOUNTER_STATE 0x4725
#define mmDC_PERFMON10_PERFCOUNTER_STATE 0x59a1
#define mmDC_PERFMON11_PERFCOUNTER_STATE 0x5f69
#define mmPERFMON_CNTL 0x173
#define mmDC_PERFMON0_PERFMON_CNTL 0x173
#define mmDC_PERFMON1_PERFMON_CNTL 0x367
#define mmDC_PERFMON2_PERFMON_CNTL 0x18cb
#define mmDC_PERFMON3_PERFMON_CNTL 0x1b27
#define mmDC_PERFMON4_PERFMON_CNTL 0x1d27
#define mmDC_PERFMON5_PERFMON_CNTL 0x1f27
#define mmDC_PERFMON6_PERFMON_CNTL 0x4127
#define mmDC_PERFMON7_PERFMON_CNTL 0x4327
#define mmDC_PERFMON8_PERFMON_CNTL 0x4527
#define mmDC_PERFMON9_PERFMON_CNTL 0x4727
#define mmDC_PERFMON10_PERFMON_CNTL 0x59a3
#define mmDC_PERFMON11_PERFMON_CNTL 0x5f6b
#define mmPERFMON_CNTL2 0x17a
#define mmDC_PERFMON0_PERFMON_CNTL2 0x17a
#define mmDC_PERFMON1_PERFMON_CNTL2 0x36e
#define mmDC_PERFMON2_PERFMON_CNTL2 0x18d2
#define mmDC_PERFMON3_PERFMON_CNTL2 0x1b2e
#define mmDC_PERFMON4_PERFMON_CNTL2 0x1d2e
#define mmDC_PERFMON5_PERFMON_CNTL2 0x1f2e
#define mmDC_PERFMON6_PERFMON_CNTL2 0x412e
#define mmDC_PERFMON7_PERFMON_CNTL2 0x432e
#define mmDC_PERFMON8_PERFMON_CNTL2 0x452e
#define mmDC_PERFMON9_PERFMON_CNTL2 0x472e
#define mmDC_PERFMON10_PERFMON_CNTL2 0x59aa
#define mmDC_PERFMON11_PERFMON_CNTL2 0x5f72
#define mmPERFMON_CVALUE_INT_MISC 0x172
#define mmDC_PERFMON0_PERFMON_CVALUE_INT_MISC 0x172
#define mmDC_PERFMON1_PERFMON_CVALUE_INT_MISC 0x366
#define mmDC_PERFMON2_PERFMON_CVALUE_INT_MISC 0x18ca
#define mmDC_PERFMON3_PERFMON_CVALUE_INT_MISC 0x1b26
#define mmDC_PERFMON4_PERFMON_CVALUE_INT_MISC 0x1d26
#define mmDC_PERFMON5_PERFMON_CVALUE_INT_MISC 0x1f26
#define mmDC_PERFMON6_PERFMON_CVALUE_INT_MISC 0x4126
#define mmDC_PERFMON7_PERFMON_CVALUE_INT_MISC 0x4326
#define mmDC_PERFMON8_PERFMON_CVALUE_INT_MISC 0x4526
#define mmDC_PERFMON9_PERFMON_CVALUE_INT_MISC 0x4726
#define mmDC_PERFMON10_PERFMON_CVALUE_INT_MISC 0x59a2
#define mmDC_PERFMON11_PERFMON_CVALUE_INT_MISC 0x5f6a
#define mmPERFMON_CVALUE_LOW 0x174
#define mmDC_PERFMON0_PERFMON_CVALUE_LOW 0x174
#define mmDC_PERFMON1_PERFMON_CVALUE_LOW 0x368
#define mmDC_PERFMON2_PERFMON_CVALUE_LOW 0x18cc
#define mmDC_PERFMON3_PERFMON_CVALUE_LOW 0x1b28
#define mmDC_PERFMON4_PERFMON_CVALUE_LOW 0x1d28
#define mmDC_PERFMON5_PERFMON_CVALUE_LOW 0x1f28
#define mmDC_PERFMON6_PERFMON_CVALUE_LOW 0x4128
#define mmDC_PERFMON7_PERFMON_CVALUE_LOW 0x4328
#define mmDC_PERFMON8_PERFMON_CVALUE_LOW 0x4528
#define mmDC_PERFMON9_PERFMON_CVALUE_LOW 0x4728
#define mmDC_PERFMON10_PERFMON_CVALUE_LOW 0x59a4
#define mmDC_PERFMON11_PERFMON_CVALUE_LOW 0x5f6c
#define mmPERFMON_HI 0x175
#define mmDC_PERFMON0_PERFMON_HI 0x175
#define mmDC_PERFMON1_PERFMON_HI 0x369
#define mmDC_PERFMON2_PERFMON_HI 0x18cd
#define mmDC_PERFMON3_PERFMON_HI 0x1b29
#define mmDC_PERFMON4_PERFMON_HI 0x1d29
#define mmDC_PERFMON5_PERFMON_HI 0x1f29
#define mmDC_PERFMON6_PERFMON_HI 0x4129
#define mmDC_PERFMON7_PERFMON_HI 0x4329
#define mmDC_PERFMON8_PERFMON_HI 0x4529
#define mmDC_PERFMON9_PERFMON_HI 0x4729
#define mmDC_PERFMON10_PERFMON_HI 0x59a5
#define mmDC_PERFMON11_PERFMON_HI 0x5f6d
#define mmPERFMON_LOW 0x176
#define mmDC_PERFMON0_PERFMON_LOW 0x176
#define mmDC_PERFMON1_PERFMON_LOW 0x36a
#define mmDC_PERFMON2_PERFMON_LOW 0x18ce
#define mmDC_PERFMON3_PERFMON_LOW 0x1b2a
#define mmDC_PERFMON4_PERFMON_LOW 0x1d2a
#define mmDC_PERFMON5_PERFMON_LOW 0x1f2a
#define mmDC_PERFMON6_PERFMON_LOW 0x412a
#define mmDC_PERFMON7_PERFMON_LOW 0x432a
#define mmDC_PERFMON8_PERFMON_LOW 0x452a
#define mmDC_PERFMON9_PERFMON_LOW 0x472a
#define mmDC_PERFMON10_PERFMON_LOW 0x59a6
#define mmDC_PERFMON11_PERFMON_LOW 0x5f6e
#define mmPERFMON_TEST_DEBUG_INDEX 0x177
#define mmDC_PERFMON0_PERFMON_TEST_DEBUG_INDEX 0x177
#define mmDC_PERFMON1_PERFMON_TEST_DEBUG_INDEX 0x36b
#define mmDC_PERFMON2_PERFMON_TEST_DEBUG_INDEX 0x18cf
#define mmDC_PERFMON3_PERFMON_TEST_DEBUG_INDEX 0x1b2b
#define mmDC_PERFMON4_PERFMON_TEST_DEBUG_INDEX 0x1d2b
#define mmDC_PERFMON5_PERFMON_TEST_DEBUG_INDEX 0x1f2b
#define mmDC_PERFMON6_PERFMON_TEST_DEBUG_INDEX 0x412b
#define mmDC_PERFMON7_PERFMON_TEST_DEBUG_INDEX 0x432b
#define mmDC_PERFMON8_PERFMON_TEST_DEBUG_INDEX 0x452b
#define mmDC_PERFMON9_PERFMON_TEST_DEBUG_INDEX 0x472b
#define mmDC_PERFMON10_PERFMON_TEST_DEBUG_INDEX 0x59a7
#define mmDC_PERFMON11_PERFMON_TEST_DEBUG_INDEX 0x5f6f
#define mmPERFMON_TEST_DEBUG_DATA 0x178
#define mmDC_PERFMON0_PERFMON_TEST_DEBUG_DATA 0x178
#define mmDC_PERFMON1_PERFMON_TEST_DEBUG_DATA 0x36c
#define mmDC_PERFMON2_PERFMON_TEST_DEBUG_DATA 0x18d0
#define mmDC_PERFMON3_PERFMON_TEST_DEBUG_DATA 0x1b2c
#define mmDC_PERFMON4_PERFMON_TEST_DEBUG_DATA 0x1d2c
#define mmDC_PERFMON5_PERFMON_TEST_DEBUG_DATA 0x1f2c
#define mmDC_PERFMON6_PERFMON_TEST_DEBUG_DATA 0x412c
#define mmDC_PERFMON7_PERFMON_TEST_DEBUG_DATA 0x432c
#define mmDC_PERFMON8_PERFMON_TEST_DEBUG_DATA 0x452c
#define mmDC_PERFMON9_PERFMON_TEST_DEBUG_DATA 0x472c
#define mmDC_PERFMON10_PERFMON_TEST_DEBUG_DATA 0x59a8
#define mmDC_PERFMON11_PERFMON_TEST_DEBUG_DATA 0x5f70
#define mmREFCLK_CNTL 0x109
#define mmDCCG_CBUS_WRCMD_DELAY 0x110
#define mmDPREFCLK_CNTL 0x118
#define mmDCE_VERSION 0x11e
#define mmAVSYNC_COUNTER_WRITE 0x12a
#define mmAVSYNC_COUNTER_CONTROL 0x12b
#define mmAVSYNC_COUNTER_READ 0x12f
#define mmDCCG_GTC_CNTL 0x120
#define mmDCCG_GTC_DTO_INCR 0x121
#define mmDCCG_GTC_DTO_MODULO 0x122
#define mmDCCG_GTC_CURRENT 0x123
#define mmDCCG_DS_DTO_INCR 0x113
#define mmDCCG_DS_DTO_MODULO 0x114
#define mmDCCG_DS_CNTL 0x115
#define mmDCCG_DS_HW_CAL_INTERVAL 0x116
#define mmDCCG_DS_DEBUG_CNTL 0x112
#define mmDMCU_SMU_INTERRUPT_CNTL 0x12c
#define mmSMU_CONTROL 0x12d
#define mmSMU_INTERRUPT_CONTROL 0x12e
#define mmDAC_CLK_ENABLE 0x128
#define mmDVO_CLK_ENABLE 0x129
#define mmDCCG_GATE_DISABLE_CNTL 0x134
#define mmDCCG_GATE_DISABLE_CNTL2 0x13c
#define mmDISPCLK_CGTT_BLK_CTRL_REG 0x135
#define mmSCLK_CGTT_BLK_CTRL_REG 0x136
#define mmDPREFCLK_CGTT_BLK_CTRL_REG 0x108
#define mmREFCLK_CGTT_BLK_CTRL_REG 0x10b
#define mmSYMCLK_CGTT_BLK_CTRL_REG 0x13d
#define mmDCCG_CAC_STATUS 0x137
#define mmPIXCLK1_RESYNC_CNTL 0x138
#define mmPIXCLK2_RESYNC_CNTL 0x139
#define mmPIXCLK0_RESYNC_CNTL 0x13a
#define mmPHYPLL_PIXCLK_CNTL 0x13e
#define mmMICROSECOND_TIME_BASE_DIV 0x13b
#define mmDCCG_DISP_CNTL_REG 0x13f
#define mmMILLISECOND_TIME_BASE_DIV 0x130
#define mmDISPCLK_FREQ_CHANGE_CNTL 0x131
#define mmDC_MEM_GLOBAL_PWR_REQ_CNTL 0x132
#define mmDCCG_PERFMON_CNTL 0x133
#define mmDCCG_PERFMON_CNTL2 0x10e
#define mmCRTC0_PIXEL_RATE_CNTL 0x140
#define mmDP_DTO0_PHASE 0x141
#define mmDP_DTO0_MODULO 0x142
#define mmCRTC1_PIXEL_RATE_CNTL 0x144
#define mmDP_DTO1_PHASE 0x145
#define mmDP_DTO1_MODULO 0x146
#define mmCRTC2_PIXEL_RATE_CNTL 0x148
#define mmDP_DTO2_PHASE 0x149
#define mmDP_DTO2_MODULO 0x14a
#define mmCRTC3_PIXEL_RATE_CNTL 0x14c
#define mmDP_DTO3_PHASE 0x14d
#define mmDP_DTO3_MODULO 0x14e
#define mmCRTC4_PIXEL_RATE_CNTL 0x150
#define mmDP_DTO4_PHASE 0x151
#define mmDP_DTO4_MODULO 0x152
#define mmCRTC5_PIXEL_RATE_CNTL 0x154
#define mmDP_DTO5_PHASE 0x155
#define mmDP_DTO5_MODULO 0x156
#define mmDCFEV0_CRTC_PIXEL_RATE_CNTL 0x104
#define mmDCCG_SOFT_RESET 0x15f
#define mmSYMCLKA_CLOCK_ENABLE 0x160
#define mmSYMCLKB_CLOCK_ENABLE 0x161
#define mmSYMCLKC_CLOCK_ENABLE 0x162
#define mmSYMCLKD_CLOCK_ENABLE 0x163
#define mmSYMCLKE_CLOCK_ENABLE 0x164
#define mmSYMCLKF_CLOCK_ENABLE 0x165
#define mmSYMCLKG_CLOCK_ENABLE 0x117
#define mmDPDBG_CLK_FORCE_CONTROL 0x10d
#define mmDCCG_AUDIO_DTO_SOURCE 0x16b
#define mmDCCG_AUDIO_DTO0_PHASE 0x16c
#define mmDCCG_AUDIO_DTO0_MODULE 0x16d
#define mmDCCG_AUDIO_DTO1_PHASE 0x16e
#define mmDCCG_AUDIO_DTO1_MODULE 0x16f
#define mmDCCG_TEST_DEBUG_INDEX 0x17c
#define mmDCCG_TEST_DEBUG_DATA 0x17d
#define mmDCCG_TEST_CLK_SEL 0x17e
#define mmCPLL_MACRO_CNTL_RESERVED0 0x5fd0
#define mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED0 0x5fd0
#define mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED0 0x5fdc
#define mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED0 0x5fe8
#define mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED0 0x5ff4
#define mmCPLL_MACRO_CNTL_RESERVED1 0x5fd1
#define mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED1 0x5fd1
#define mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED1 0x5fdd
#define mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED1 0x5fe9
#define mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED1 0x5ff5
#define mmCPLL_MACRO_CNTL_RESERVED2 0x5fd2
#define mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED2 0x5fd2
#define mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED2 0x5fde
#define mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED2 0x5fea
#define mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED2 0x5ff6
#define mmCPLL_MACRO_CNTL_RESERVED3 0x5fd3
#define mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED3 0x5fd3
#define mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED3 0x5fdf
#define mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED3 0x5feb
#define mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED3 0x5ff7
#define mmCPLL_MACRO_CNTL_RESERVED4 0x5fd4
#define mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED4 0x5fd4
#define mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED4 0x5fe0
#define mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED4 0x5fec
#define mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED4 0x5ff8
#define mmCPLL_MACRO_CNTL_RESERVED5 0x5fd5
#define mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED5 0x5fd5
#define mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED5 0x5fe1
#define mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED5 0x5fed
#define mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED5 0x5ff9
#define mmCPLL_MACRO_CNTL_RESERVED6 0x5fd6
#define mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED6 0x5fd6
#define mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED6 0x5fe2
#define mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED6 0x5fee
#define mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED6 0x5ffa
#define mmCPLL_MACRO_CNTL_RESERVED7 0x5fd7
#define mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED7 0x5fd7
#define mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED7 0x5fe3
#define mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED7 0x5fef
#define mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED7 0x5ffb
#define mmCPLL_MACRO_CNTL_RESERVED8 0x5fd8
#define mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED8 0x5fd8
#define mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED8 0x5fe4
#define mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED8 0x5ff0
#define mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED8 0x5ffc
#define mmCPLL_MACRO_CNTL_RESERVED9 0x5fd9
#define mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED9 0x5fd9
#define mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED9 0x5fe5
#define mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED9 0x5ff1
#define mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED9 0x5ffd
#define mmCPLL_MACRO_CNTL_RESERVED10 0x5fda
#define mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED10 0x5fda
#define mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED10 0x5fe6
#define mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED10 0x5ff2
#define mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED10 0x5ffe
#define mmCPLL_MACRO_CNTL_RESERVED11 0x5fdb
#define mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED11 0x5fdb
#define mmDCCG_CPLL1_CPLL_MACRO_CNTL_RESERVED11 0x5fe7
#define mmDCCG_CPLL2_CPLL_MACRO_CNTL_RESERVED11 0x5ff3
#define mmDCCG_CPLL3_CPLL_MACRO_CNTL_RESERVED11 0x5fff
#define mmPLL_MACRO_CNTL_RESERVED0 0x1700
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED0 0x1700
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED0 0x172a
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED0 0x1754
#define mmPLL_MACRO_CNTL_RESERVED1 0x1701
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED1 0x1701
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED1 0x172b
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED1 0x1755
#define mmPLL_MACRO_CNTL_RESERVED2 0x1702
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED2 0x1702
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED2 0x172c
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED2 0x1756
#define mmPLL_MACRO_CNTL_RESERVED3 0x1703
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED3 0x1703
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED3 0x172d
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED3 0x1757
#define mmPLL_MACRO_CNTL_RESERVED4 0x1704
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED4 0x1704
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED4 0x172e
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED4 0x1758
#define mmPLL_MACRO_CNTL_RESERVED5 0x1705
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED5 0x1705
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED5 0x172f
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED5 0x1759
#define mmPLL_MACRO_CNTL_RESERVED6 0x1706
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED6 0x1706
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED6 0x1730
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED6 0x175a
#define mmPLL_MACRO_CNTL_RESERVED7 0x1707
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED7 0x1707
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED7 0x1731
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED7 0x175b
#define mmPLL_MACRO_CNTL_RESERVED8 0x1708
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED8 0x1708
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED8 0x1732
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED8 0x175c
#define mmPLL_MACRO_CNTL_RESERVED9 0x1709
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED9 0x1709
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED9 0x1733
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED9 0x175d
#define mmPLL_MACRO_CNTL_RESERVED10 0x170a
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED10 0x170a
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED10 0x1734
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED10 0x175e
#define mmPLL_MACRO_CNTL_RESERVED11 0x170b
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED11 0x170b
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED11 0x1735
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED11 0x175f
#define mmPLL_MACRO_CNTL_RESERVED12 0x170c
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED12 0x170c
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED12 0x1736
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED12 0x1760
#define mmPLL_MACRO_CNTL_RESERVED13 0x170d
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED13 0x170d
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED13 0x1737
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED13 0x1761
#define mmPLL_MACRO_CNTL_RESERVED14 0x170e
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED14 0x170e
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED14 0x1738
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED14 0x1762
#define mmPLL_MACRO_CNTL_RESERVED15 0x170f
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED15 0x170f
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED15 0x1739
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED15 0x1763
#define mmPLL_MACRO_CNTL_RESERVED16 0x1710
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED16 0x1710
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED16 0x173a
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED16 0x1764
#define mmPLL_MACRO_CNTL_RESERVED17 0x1711
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED17 0x1711
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED17 0x173b
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED17 0x1765
#define mmPLL_MACRO_CNTL_RESERVED18 0x1712
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED18 0x1712
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED18 0x173c
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED18 0x1766
#define mmPLL_MACRO_CNTL_RESERVED19 0x1713
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED19 0x1713
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED19 0x173d
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED19 0x1767
#define mmPLL_MACRO_CNTL_RESERVED20 0x1714
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED20 0x1714
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED20 0x173e
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED20 0x1768
#define mmPLL_MACRO_CNTL_RESERVED21 0x1715
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED21 0x1715
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED21 0x173f
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED21 0x1769
#define mmPLL_MACRO_CNTL_RESERVED22 0x1716
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED22 0x1716
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED22 0x1740
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED22 0x176a
#define mmPLL_MACRO_CNTL_RESERVED23 0x1717
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED23 0x1717
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED23 0x1741
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED23 0x176b
#define mmPLL_MACRO_CNTL_RESERVED24 0x1718
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED24 0x1718
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED24 0x1742
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED24 0x176c
#define mmPLL_MACRO_CNTL_RESERVED25 0x1719
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED25 0x1719
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED25 0x1743
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED25 0x176d
#define mmPLL_MACRO_CNTL_RESERVED26 0x171a
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED26 0x171a
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED26 0x1744
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED26 0x176e
#define mmPLL_MACRO_CNTL_RESERVED27 0x171b
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED27 0x171b
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED27 0x1745
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED27 0x176f
#define mmPLL_MACRO_CNTL_RESERVED28 0x171c
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED28 0x171c
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED28 0x1746
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED28 0x1770
#define mmPLL_MACRO_CNTL_RESERVED29 0x171d
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED29 0x171d
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED29 0x1747
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED29 0x1771
#define mmPLL_MACRO_CNTL_RESERVED30 0x171e
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED30 0x171e
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED30 0x1748
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED30 0x1772
#define mmPLL_MACRO_CNTL_RESERVED31 0x171f
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED31 0x171f
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED31 0x1749
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED31 0x1773
#define mmPLL_MACRO_CNTL_RESERVED32 0x1720
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED32 0x1720
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED32 0x174a
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED32 0x1774
#define mmPLL_MACRO_CNTL_RESERVED33 0x1721
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED33 0x1721
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED33 0x174b
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED33 0x1775
#define mmPLL_MACRO_CNTL_RESERVED34 0x1722
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED34 0x1722
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED34 0x174c
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED34 0x1776
#define mmPLL_MACRO_CNTL_RESERVED35 0x1723
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED35 0x1723
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED35 0x174d
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED35 0x1777
#define mmPLL_MACRO_CNTL_RESERVED36 0x1724
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED36 0x1724
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED36 0x174e
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED36 0x1778
#define mmPLL_MACRO_CNTL_RESERVED37 0x1725
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED37 0x1725
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED37 0x174f
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED37 0x1779
#define mmPLL_MACRO_CNTL_RESERVED38 0x1726
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED38 0x1726
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED38 0x1750
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED38 0x177a
#define mmPLL_MACRO_CNTL_RESERVED39 0x1727
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED39 0x1727
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED39 0x1751
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED39 0x177b
#define mmPLL_MACRO_CNTL_RESERVED40 0x1728
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED40 0x1728
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED40 0x1752
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED40 0x177c
#define mmPLL_MACRO_CNTL_RESERVED41 0x1729
#define mmDCCG_PLL0_PLL_MACRO_CNTL_RESERVED41 0x1729
#define mmDCCG_PLL1_PLL_MACRO_CNTL_RESERVED41 0x1753
#define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED41 0x177d
#define mmDENTIST_DISPCLK_CNTL 0x124
#define mmDCDEBUG_BUS_CLK1_SEL 0x16c4
#define mmDCDEBUG_BUS_CLK2_SEL 0x16c5
#define mmDCDEBUG_BUS_CLK3_SEL 0x16c6
#define mmDCDEBUG_BUS_CLK4_SEL 0x16c7
#define mmDCDEBUG_BUS_CLK5_SEL 0x16c8
#define mmDCDEBUG_OUT_PIN_OVERRIDE 0x16c9
#define mmDCDEBUG_OUT_CNTL 0x16ca
#define mmDCDEBUG_OUT_DATA 0x16cb
#define mmDMIF_ADDR_CONFIG 0x2f5
#define mmDMIF_CONTROL 0x2f6
#define mmDMIF_STATUS 0x2f7
#define mmDMIF_HW_DEBUG 0x2f8
#define mmDMIF_ARBITRATION_CONTROL 0x2f9
#define mmPIPE0_ARBITRATION_CONTROL3 0x2fa
#define mmPIPE1_ARBITRATION_CONTROL3 0x2fb
#define mmPIPE2_ARBITRATION_CONTROL3 0x2fc
#define mmPIPE3_ARBITRATION_CONTROL3 0x2fd
#define mmPIPE4_ARBITRATION_CONTROL3 0x2fe
#define mmPIPE5_ARBITRATION_CONTROL3 0x2ff
#define mmPIPE6_ARBITRATION_CONTROL3 0x32a
#define mmPIPE7_ARBITRATION_CONTROL3 0x32b
#define mmDMIF_P_VMID 0x300
#define mmDMIF_URG_OVERRIDE 0x329
#define mmDMIF_TEST_DEBUG_INDEX 0x301
#define mmDMIF_TEST_DEBUG_DATA 0x302
#define ixDMIF_DEBUG02_CORE0 0x2
#define ixDMIF_DEBUG02_CORE1 0xa
#define mmDMIF_ADDR_CALC 0x303
#define mmDMIF_STATUS2 0x304
#define mmPIPE0_MAX_REQUESTS 0x305
#define mmPIPE1_MAX_REQUESTS 0x306
#define mmPIPE2_MAX_REQUESTS 0x307
#define mmPIPE3_MAX_REQUESTS 0x308
#define mmPIPE4_MAX_REQUESTS 0x309
#define mmPIPE5_MAX_REQUESTS 0x30a
#define mmPIPE6_MAX_REQUESTS 0x32c
#define mmPIPE7_MAX_REQUESTS 0x32d
#define mmDVMM_REG_RD_STATUS 0x32e
#define mmDVMM_REG_RD_DATA 0x32f
#define mmDVMM_PTE_REQ 0x330
#define mmDVMM_CNTL 0x331
#define mmDVMM_FAULT_STATUS 0x332
#define mmDVMM_FAULT_ADDR 0x333
#define mmLOW_POWER_TILING_CONTROL 0x30b
#define mmMCIF_CONTROL 0x30c
#define mmMCIF_WRITE_COMBINE_CONTROL 0x30d
#define mmMCIF_TEST_DEBUG_INDEX 0x30e
#define mmMCIF_TEST_DEBUG_DATA 0x30f
#define ixIDDCCIF02_DBG_DCCIF_C 0x9
#define ixIDDCCIF04_DBG_DCCIF_E 0xb
#define ixIDDCCIF05_DBG_DCCIF_F 0xc
#define mmMCIF_VMID 0x310
#define mmMCIF_MEM_CONTROL 0x311
#define mmCC_DC_PIPE_DIS 0x312
#define mmMC_DC_INTERFACE_NACK_STATUS 0x313
#define mmRBBMIF_TIMEOUT 0x314
#define mmRBBMIF_STATUS 0x315
#define mmRBBMIF_TIMEOUT_DIS 0x316
#define mmRBBMIF_STATUS_FLAG 0x327
#define mmDCI_MEM_PWR_STATUS 0x317
#define mmDCI_MEM_PWR_STATUS2 0x318
#define mmDCI_CLK_CNTL 0x319
#define mmDCI_CLK_RAMP_CNTL 0x31a
#define mmDCI_MEM_PWR_CNTL 0x31b
#define mmDCI_MEM_PWR_CNTL2 0x31c
#define mmDCI_MEM_PWR_CNTL3 0x31d
#define mmDVMM_PTE_PGMEM_CONTROL 0x335
#define mmDVMM_PTE_PGMEM_STATE 0x336
#define mmDCI_SOFT_RESET 0x328
#define mmDCI_MISC 0x334
#define mmDCI_TEST_DEBUG_INDEX 0x31e
#define mmDCI_TEST_DEBUG_DATA 0x31f
#define mmDCI_DEBUG_CONFIG 0x320
#define mmPIPE0_DMIF_BUFFER_CONTROL 0x321
#define mmPIPE1_DMIF_BUFFER_CONTROL 0x322
#define mmPIPE2_DMIF_BUFFER_CONTROL 0x323
#define mmPIPE3_DMIF_BUFFER_CONTROL 0x324
#define mmPIPE4_DMIF_BUFFER_CONTROL 0x325
#define mmPIPE5_DMIF_BUFFER_CONTROL 0x326
#define mmDC_GENERICA 0x4800
#define mmDC_GENERICB 0x4801
#define mmDC_PAD_EXTERN_SIG 0x4802
#define mmDC_REF_CLK_CNTL 0x4803
#define mmDC_GPIO_DEBUG 0x4804
#define mmUNIPHYA_LINK_CNTL 0x4805
#define mmUNIPHYB_LINK_CNTL 0x4807
#define mmUNIPHYC_LINK_CNTL 0x4809
#define mmUNIPHYD_LINK_CNTL 0x480b
#define mmUNIPHYE_LINK_CNTL 0x480d
#define mmUNIPHYF_LINK_CNTL 0x480f
#define mmUNIPHYG_LINK_CNTL 0x4811
#define mmUNIPHYA_CHANNEL_XBAR_CNTL 0x4806
#define mmUNIPHYB_CHANNEL_XBAR_CNTL 0x4808
#define mmUNIPHYC_CHANNEL_XBAR_CNTL 0x480a
#define mmUNIPHYD_CHANNEL_XBAR_CNTL 0x480c
#define mmUNIPHYE_CHANNEL_XBAR_CNTL 0x480e
#define mmUNIPHYF_CHANNEL_XBAR_CNTL 0x4810
#define mmUNIPHYG_CHANNEL_XBAR_CNTL 0x4812
#define mmUNIPHYLPA_LINK_CNTL 0x4847
#define mmUNIPHYLPB_LINK_CNTL 0x4848
#define mmUNIPHYLPA_CHANNEL_XBAR_CNTL 0x4849
#define mmUNIPHYLPB_CHANNEL_XBAR_CNTL 0x484a
#define mmUNIPHY_IMPCAL_LINKA 0x4838
#define mmUNIPHY_IMPCAL_LINKB 0x4839
#define mmUNIPHY_IMPCAL_LINKC 0x483f
#define mmUNIPHY_IMPCAL_LINKD 0x4840
#define mmUNIPHY_IMPCAL_LINKE 0x4843
#define mmUNIPHY_IMPCAL_LINKF 0x4844
#define mmUNIPHY_IMPCAL_PERIOD 0x483a
#define mmAUXP_IMPCAL 0x483b
#define mmAUXN_IMPCAL 0x483c
#define mmDCIO_IMPCAL_CNTL 0x483d
#define mmUNIPHY_IMPCAL_PSW_AB 0x483e
#define mmDCIO_IMPCAL_CNTL_CD 0x4841
#define mmUNIPHY_IMPCAL_PSW_CD 0x4842
#define mmDCIO_IMPCAL_CNTL_EF 0x4845
#define mmUNIPHY_IMPCAL_PSW_EF 0x4846
#define mmDCIO_WRCMD_DELAY 0x4816
#define mmDC_PINSTRAPS 0x4818
#define mmDC_DVODATA_CONFIG 0x481a
#define mmLVTMA_PWRSEQ_CNTL 0x481b
#define mmLVTMA_PWRSEQ_STATE 0x481c
#define mmLVTMA_PWRSEQ_REF_DIV 0x481d
#define mmLVTMA_PWRSEQ_DELAY1 0x481e
#define mmLVTMA_PWRSEQ_DELAY2 0x481f
#define mmBL_PWM_CNTL 0x4820
#define mmBL_PWM_CNTL2 0x4821
#define mmBL_PWM_PERIOD_CNTL 0x4822
#define mmBL_PWM_GRP1_REG_LOCK 0x4823
#define mmDCIO_GSL_GENLK_PAD_CNTL 0x4824
#define mmDCIO_GSL_SWAPLOCK_PAD_CNTL 0x4825
#define mmDCIO_GSL0_CNTL 0x4826
#define mmDCIO_GSL1_CNTL 0x4827
#define mmDCIO_GSL2_CNTL 0x4828
#define mmDC_GPU_TIMER_START_POSITION_V_UPDATE 0x4829
#define mmDC_GPU_TIMER_START_POSITION_P_FLIP 0x482a
#define mmDC_GPU_TIMER_READ 0x482b
#define mmDC_GPU_TIMER_READ_CNTL 0x482c
#define mmDCIO_CLOCK_CNTL 0x482d
#define mmDCIO_DEBUG 0x482f
#define mmDCO_DCFE_EXT_VSYNC_CNTL 0x4830
#define mmDBG_OUT_CNTL 0x4834
#define mmDCIO_DEBUG_CONFIG 0x4835
#define mmDCIO_SOFT_RESET 0x4836
#define mmDCIO_DPHY_SEL 0x4837
#define mmDCIO_TEST_DEBUG_INDEX 0x4831
#define mmDCIO_TEST_DEBUG_DATA 0x4832
#define ixDCIO_DEBUG1 0x1
#define ixDCIO_DEBUG2 0x2
#define ixDCIO_DEBUG3 0x3
#define ixDCIO_DEBUG4 0x4
#define ixDCIO_DEBUG5 0x5
#define ixDCIO_DEBUG6 0x6
#define ixDCIO_DEBUG7 0x7
#define ixDCIO_DEBUG8 0x8
#define ixDCIO_DEBUG9 0x9
#define ixDCIO_DEBUGA 0xa
#define ixDCIO_DEBUGB 0xb
#define ixDCIO_DEBUGC 0xc
#define ixDCIO_DEBUGD 0xd
#define ixDCIO_DEBUGE 0xe
#define ixDCIO_DEBUGF 0xf
#define ixDCIO_DEBUG10 0x10
#define ixDCIO_DEBUG11 0x11
#define ixDCIO_DEBUG12 0x12
#define ixDCIO_DEBUG13 0x13
#define ixDCIO_DEBUG14 0x14
#define ixDCIO_DEBUG15 0x15
#define ixDCIO_DEBUG16 0x16
#define ixDCIO_DEBUG17 0x17
#define ixDCIO_DEBUG18 0x18
#define ixDCIO_DEBUG19 0x19
#define ixDCIO_DEBUG1A 0x1a
#define ixDCIO_DEBUG1B 0x1b
#define ixDCIO_DEBUG_ID 0x0
#define mmDC_GPIO_GENERIC_MASK 0x4860
#define mmDC_GPIO_GENERIC_A 0x4861
#define mmDC_GPIO_GENERIC_EN 0x4862
#define mmDC_GPIO_GENERIC_Y 0x4863
#define mmDC_GPIO_DVODATA_MASK 0x4864
#define mmDC_GPIO_DVODATA_A 0x4865
#define mmDC_GPIO_DVODATA_EN 0x4866
#define mmDC_GPIO_DVODATA_Y 0x4867
#define mmDC_GPIO_DDC1_MASK 0x4868
#define mmDC_GPIO_DDC1_A 0x4869
#define mmDC_GPIO_DDC1_EN 0x486a
#define mmDC_GPIO_DDC1_Y 0x486b
#define mmDC_GPIO_DDC2_MASK 0x486c
#define mmDC_GPIO_DDC2_A 0x486d
#define mmDC_GPIO_DDC2_EN 0x486e
#define mmDC_GPIO_DDC2_Y 0x486f
#define mmDC_GPIO_DDC3_MASK 0x4870
#define mmDC_GPIO_DDC3_A 0x4871
#define mmDC_GPIO_DDC3_EN 0x4872
#define mmDC_GPIO_DDC3_Y 0x4873
#define mmDC_GPIO_DDC4_MASK 0x4874
#define mmDC_GPIO_DDC4_A 0x4875
#define mmDC_GPIO_DDC4_EN 0x4876
#define mmDC_GPIO_DDC4_Y 0x4877
#define mmDC_GPIO_DDC5_MASK 0x4878
#define mmDC_GPIO_DDC5_A 0x4879
#define mmDC_GPIO_DDC5_EN 0x487a
#define mmDC_GPIO_DDC5_Y 0x487b
#define mmDC_GPIO_DDC6_MASK 0x487c
#define mmDC_GPIO_DDC6_A 0x487d
#define mmDC_GPIO_DDC6_EN 0x487e
#define mmDC_GPIO_DDC6_Y 0x487f
#define mmDC_GPIO_DDCVGA_MASK 0x4880
#define mmDC_GPIO_DDCVGA_A 0x4881
#define mmDC_GPIO_DDCVGA_EN 0x4882
#define mmDC_GPIO_DDCVGA_Y 0x4883
#define mmDC_GPIO_SYNCA_MASK 0x4884
#define mmDC_GPIO_SYNCA_A 0x4885
#define mmDC_GPIO_SYNCA_EN 0x4886
#define mmDC_GPIO_SYNCA_Y 0x4887
#define mmDC_GPIO_GENLK_MASK 0x4888
#define mmDC_GPIO_GENLK_A 0x4889
#define mmDC_GPIO_GENLK_EN 0x488a
#define mmDC_GPIO_GENLK_Y 0x488b
#define mmDC_GPIO_HPD_MASK 0x488c
#define mmDC_GPIO_HPD_A 0x488d
#define mmDC_GPIO_HPD_EN 0x488e
#define mmDC_GPIO_HPD_Y 0x488f
#define mmDC_GPIO_PWRSEQ_MASK 0x4890
#define mmDC_GPIO_PWRSEQ_A 0x4891
#define mmDC_GPIO_PWRSEQ_EN 0x4892
#define mmDC_GPIO_PWRSEQ_Y 0x4893
#define mmDC_GPIO_PAD_STRENGTH_1 0x4894
#define mmDC_GPIO_PAD_STRENGTH_2 0x4895
#define mmPHY_AUX_CNTL 0x4897
#define mmDC_GPIO_I2CPAD_MASK 0x4898
#define mmDC_GPIO_I2CPAD_A 0x4899
#define mmDC_GPIO_I2CPAD_EN 0x489a
#define mmDC_GPIO_I2CPAD_Y 0x489b
#define mmDC_GPIO_I2CPAD_STRENGTH 0x489c
#define mmDVO_VREF_CONTROL 0x489e
#define mmDVO_SKEW_ADJUST 0x489f
#define mmDAC_MACRO_CNTL_RESERVED0 0x48b8
#define mmDAC_MACRO_CNTL_RESERVED1 0x48b9
#define mmDAC_MACRO_CNTL_RESERVED2 0x48ba
#define mmDAC_MACRO_CNTL_RESERVED3 0x48bb
#define mmUNIPHY_MACRO_CNTL_RESERVED0 0x48c0
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED0 0x48c0
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED0 0x48e0
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED0 0x4900
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED0 0x4920
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED0 0x4940
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED0 0x4960
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED0 0x4980
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED0 0x49c0
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED0 0x49e0
#define mmUNIPHY_MACRO_CNTL_RESERVED1 0x48c1
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED1 0x48c1
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED1 0x48e1
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED1 0x4901
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED1 0x4921
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED1 0x4941
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED1 0x4961
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED1 0x4981
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED1 0x49c1
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED1 0x49e1
#define mmUNIPHY_MACRO_CNTL_RESERVED2 0x48c2
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED2 0x48c2
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED2 0x48e2
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED2 0x4902
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED2 0x4922
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED2 0x4942
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED2 0x4962
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED2 0x4982
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED2 0x49c2
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED2 0x49e2
#define mmUNIPHY_MACRO_CNTL_RESERVED3 0x48c3
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED3 0x48c3
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED3 0x48e3
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED3 0x4903
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED3 0x4923
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED3 0x4943
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED3 0x4963
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED3 0x4983
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED3 0x49c3
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED3 0x49e3
#define mmUNIPHY_MACRO_CNTL_RESERVED4 0x48c4
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED4 0x48c4
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED4 0x48e4
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED4 0x4904
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED4 0x4924
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED4 0x4944
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED4 0x4964
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED4 0x4984
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED4 0x49c4
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED4 0x49e4
#define mmUNIPHY_MACRO_CNTL_RESERVED5 0x48c5
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED5 0x48c5
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED5 0x48e5
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED5 0x4905
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED5 0x4925
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED5 0x4945
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED5 0x4965
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED5 0x4985
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED5 0x49c5
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED5 0x49e5
#define mmUNIPHY_MACRO_CNTL_RESERVED6 0x48c6
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED6 0x48c6
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED6 0x48e6
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED6 0x4906
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED6 0x4926
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED6 0x4946
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED6 0x4966
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED6 0x4986
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED6 0x49c6
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED6 0x49e6
#define mmUNIPHY_MACRO_CNTL_RESERVED7 0x48c7
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED7 0x48c7
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED7 0x48e7
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED7 0x4907
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED7 0x4927
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED7 0x4947
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED7 0x4967
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED7 0x4987
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED7 0x49c7
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED7 0x49e7
#define mmUNIPHY_MACRO_CNTL_RESERVED8 0x48c8
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED8 0x48c8
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED8 0x48e8
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED8 0x4908
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED8 0x4928
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED8 0x4948
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED8 0x4968
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED8 0x4988
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED8 0x49c8
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED8 0x49e8
#define mmUNIPHY_MACRO_CNTL_RESERVED9 0x48c9
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED9 0x48c9
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED9 0x48e9
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED9 0x4909
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED9 0x4929
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED9 0x4949
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED9 0x4969
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED9 0x4989
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED9 0x49c9
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED9 0x49e9
#define mmUNIPHY_MACRO_CNTL_RESERVED10 0x48ca
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED10 0x48ca
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED10 0x48ea
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED10 0x490a
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED10 0x492a
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED10 0x494a
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED10 0x496a
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED10 0x498a
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED10 0x49ca
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED10 0x49ea
#define mmUNIPHY_MACRO_CNTL_RESERVED11 0x48cb
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED11 0x48cb
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED11 0x48eb
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED11 0x490b
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED11 0x492b
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED11 0x494b
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED11 0x496b
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED11 0x498b
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED11 0x49cb
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED11 0x49eb
#define mmUNIPHY_MACRO_CNTL_RESERVED12 0x48cc
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED12 0x48cc
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED12 0x48ec
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED12 0x490c
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED12 0x492c
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED12 0x494c
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED12 0x496c
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED12 0x498c
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED12 0x49cc
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED12 0x49ec
#define mmUNIPHY_MACRO_CNTL_RESERVED13 0x48cd
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED13 0x48cd
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED13 0x48ed
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED13 0x490d
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED13 0x492d
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED13 0x494d
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED13 0x496d
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED13 0x498d
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED13 0x49cd
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED13 0x49ed
#define mmUNIPHY_MACRO_CNTL_RESERVED14 0x48ce
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED14 0x48ce
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED14 0x48ee
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED14 0x490e
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED14 0x492e
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED14 0x494e
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED14 0x496e
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED14 0x498e
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED14 0x49ce
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED14 0x49ee
#define mmUNIPHY_MACRO_CNTL_RESERVED15 0x48cf
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED15 0x48cf
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED15 0x48ef
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED15 0x490f
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED15 0x492f
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED15 0x494f
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED15 0x496f
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED15 0x498f
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED15 0x49cf
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED15 0x49ef
#define mmUNIPHY_MACRO_CNTL_RESERVED16 0x48d0
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED16 0x48d0
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED16 0x48f0
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED16 0x4910
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED16 0x4930
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED16 0x4950
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED16 0x4970
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED16 0x4990
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED16 0x49d0
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED16 0x49f0
#define mmUNIPHY_MACRO_CNTL_RESERVED17 0x48d1
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED17 0x48d1
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED17 0x48f1
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED17 0x4911
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED17 0x4931
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED17 0x4951
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED17 0x4971
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED17 0x4991
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED17 0x49d1
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED17 0x49f1
#define mmUNIPHY_MACRO_CNTL_RESERVED18 0x48d2
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED18 0x48d2
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED18 0x48f2
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED18 0x4912
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED18 0x4932
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED18 0x4952
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED18 0x4972
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED18 0x4992
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED18 0x49d2
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED18 0x49f2
#define mmUNIPHY_MACRO_CNTL_RESERVED19 0x48d3
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED19 0x48d3
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED19 0x48f3
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED19 0x4913
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED19 0x4933
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED19 0x4953
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED19 0x4973
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED19 0x4993
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED19 0x49d3
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED19 0x49f3
#define mmUNIPHY_MACRO_CNTL_RESERVED20 0x48d4
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED20 0x48d4
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED20 0x48f4
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED20 0x4914
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED20 0x4934
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED20 0x4954
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED20 0x4974
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED20 0x4994
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED20 0x49d4
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED20 0x49f4
#define mmUNIPHY_MACRO_CNTL_RESERVED21 0x48d5
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED21 0x48d5
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED21 0x48f5
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED21 0x4915
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED21 0x4935
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED21 0x4955
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED21 0x4975
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED21 0x4995
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED21 0x49d5
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED21 0x49f5
#define mmUNIPHY_MACRO_CNTL_RESERVED22 0x48d6
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED22 0x48d6
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED22 0x48f6
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED22 0x4916
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED22 0x4936
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED22 0x4956
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED22 0x4976
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED22 0x4996
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED22 0x49d6
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED22 0x49f6
#define mmUNIPHY_MACRO_CNTL_RESERVED23 0x48d7
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED23 0x48d7
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED23 0x48f7
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED23 0x4917
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED23 0x4937
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED23 0x4957
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED23 0x4977
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED23 0x4997
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED23 0x49d7
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED23 0x49f7
#define mmUNIPHY_MACRO_CNTL_RESERVED24 0x48d8
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED24 0x48d8
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED24 0x48f8
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED24 0x4918
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED24 0x4938
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED24 0x4958
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED24 0x4978
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED24 0x4998
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED24 0x49d8
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED24 0x49f8
#define mmUNIPHY_MACRO_CNTL_RESERVED25 0x48d9
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED25 0x48d9
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED25 0x48f9
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED25 0x4919
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED25 0x4939
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED25 0x4959
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED25 0x4979
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED25 0x4999
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED25 0x49d9
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED25 0x49f9
#define mmUNIPHY_MACRO_CNTL_RESERVED26 0x48da
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED26 0x48da
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED26 0x48fa
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED26 0x491a
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED26 0x493a
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED26 0x495a
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED26 0x497a
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED26 0x499a
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED26 0x49da
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED26 0x49fa
#define mmUNIPHY_MACRO_CNTL_RESERVED27 0x48db
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED27 0x48db
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED27 0x48fb
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED27 0x491b
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED27 0x493b
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED27 0x495b
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED27 0x497b
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED27 0x499b
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED27 0x49db
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED27 0x49fb
#define mmUNIPHY_MACRO_CNTL_RESERVED28 0x48dc
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED28 0x48dc
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED28 0x48fc
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED28 0x491c
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED28 0x493c
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED28 0x495c
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED28 0x497c
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED28 0x499c
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED28 0x49dc
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED28 0x49fc
#define mmUNIPHY_MACRO_CNTL_RESERVED29 0x48dd
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED29 0x48dd
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED29 0x48fd
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED29 0x491d
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED29 0x493d
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED29 0x495d
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED29 0x497d
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED29 0x499d
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED29 0x49dd
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED29 0x49fd
#define mmUNIPHY_MACRO_CNTL_RESERVED30 0x48de
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED30 0x48de
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED30 0x48fe
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED30 0x491e
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED30 0x493e
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED30 0x495e
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED30 0x497e
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED30 0x499e
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED30 0x49de
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED30 0x49fe
#define mmUNIPHY_MACRO_CNTL_RESERVED31 0x48df
#define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED31 0x48df
#define mmDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED31 0x48ff
#define mmDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED31 0x491f
#define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED31 0x493f
#define mmDCIO_UNIPHY4_UNIPHY_MACRO_CNTL_RESERVED31 0x495f
#define mmDCIO_UNIPHY5_UNIPHY_MACRO_CNTL_RESERVED31 0x497f
#define mmDCIO_UNIPHY6_UNIPHY_MACRO_CNTL_RESERVED31 0x499f
#define mmDCIO_UNIPHY7_UNIPHY_MACRO_CNTL_RESERVED31 0x49df
#define mmDCIO_UNIPHY8_UNIPHY_MACRO_CNTL_RESERVED31 0x49ff
#define mmDCRX_PHY_MACRO_CNTL_RESERVED0 0x5a84
#define mmDCRX_PHY_MACRO_CNTL_RESERVED1 0x5a85
#define mmDCRX_PHY_MACRO_CNTL_RESERVED2 0x5a86
#define mmDCRX_PHY_MACRO_CNTL_RESERVED3 0x5a87
#define mmDCRX_PHY_MACRO_CNTL_RESERVED4 0x5a88
#define mmDCRX_PHY_MACRO_CNTL_RESERVED5 0x5a89
#define mmDCRX_PHY_MACRO_CNTL_RESERVED6 0x5a8a
#define mmDCRX_PHY_MACRO_CNTL_RESERVED7 0x5a8b
#define mmDCRX_PHY_MACRO_CNTL_RESERVED8 0x5a8c
#define mmDCRX_PHY_MACRO_CNTL_RESERVED9 0x5a8d
#define mmDCRX_PHY_MACRO_CNTL_RESERVED10 0x5a8e
#define mmDCRX_PHY_MACRO_CNTL_RESERVED11 0x5a8f
#define mmDCRX_PHY_MACRO_CNTL_RESERVED12 0x5a90
#define mmDCRX_PHY_MACRO_CNTL_RESERVED13 0x5a91
#define mmDCRX_PHY_MACRO_CNTL_RESERVED14 0x5a92
#define mmDCRX_PHY_MACRO_CNTL_RESERVED15 0x5a93
#define mmDCRX_PHY_MACRO_CNTL_RESERVED16 0x5a94
#define mmDCRX_PHY_MACRO_CNTL_RESERVED17 0x5a95
#define mmDCRX_PHY_MACRO_CNTL_RESERVED18 0x5a96
#define mmDCRX_PHY_MACRO_CNTL_RESERVED19 0x5a97
#define mmDCRX_PHY_MACRO_CNTL_RESERVED20 0x5a98
#define mmDCRX_PHY_MACRO_CNTL_RESERVED21 0x5a99
#define mmDCRX_PHY_MACRO_CNTL_RESERVED22 0x5a9a
#define mmDCRX_PHY_MACRO_CNTL_RESERVED23 0x5a9b
#define mmDCRX_PHY_MACRO_CNTL_RESERVED24 0x5a9c
#define mmDCRX_PHY_MACRO_CNTL_RESERVED25 0x5a9d
#define mmDCRX_PHY_MACRO_CNTL_RESERVED26 0x5a9e
#define mmDCRX_PHY_MACRO_CNTL_RESERVED27 0x5a9f
#define mmDCRX_PHY_MACRO_CNTL_RESERVED28 0x5aa0
#define mmDCRX_PHY_MACRO_CNTL_RESERVED29 0x5aa1
#define mmDCRX_PHY_MACRO_CNTL_RESERVED30 0x5aa2
#define mmDCRX_PHY_MACRO_CNTL_RESERVED31 0x5aa3
#define mmDCRX_PHY_MACRO_CNTL_RESERVED32 0x5aa4
#define mmDCRX_PHY_MACRO_CNTL_RESERVED33 0x5aa5
#define mmDCRX_PHY_MACRO_CNTL_RESERVED34 0x5aa6
#define mmDCRX_PHY_MACRO_CNTL_RESERVED35 0x5aa7
#define mmDCRX_PHY_MACRO_CNTL_RESERVED36 0x5aa8
#define mmDCRX_PHY_MACRO_CNTL_RESERVED37 0x5aa9
#define mmDCRX_PHY_MACRO_CNTL_RESERVED38 0x5aaa
#define mmDCRX_PHY_MACRO_CNTL_RESERVED39 0x5aab
#define mmDCRX_PHY_MACRO_CNTL_RESERVED40 0x5aac
#define mmDCRX_PHY_MACRO_CNTL_RESERVED41 0x5aad
#define mmDCRX_PHY_MACRO_CNTL_RESERVED42 0x5aae
#define mmDCRX_PHY_MACRO_CNTL_RESERVED43 0x5aaf
#define mmDCRX_PHY_MACRO_CNTL_RESERVED44 0x5ab0
#define mmDCRX_PHY_MACRO_CNTL_RESERVED45 0x5ab1
#define mmDCRX_PHY_MACRO_CNTL_RESERVED46 0x5ab2
#define mmDCRX_PHY_MACRO_CNTL_RESERVED47 0x5ab3
#define mmDCRX_PHY_MACRO_CNTL_RESERVED48 0x5ab4
#define mmDCRX_PHY_MACRO_CNTL_RESERVED49 0x5ab5
#define mmDCRX_PHY_MACRO_CNTL_RESERVED50 0x5ab6
#define mmDCRX_PHY_MACRO_CNTL_RESERVED51 0x5ab7
#define mmDCRX_PHY_MACRO_CNTL_RESERVED52 0x5ab8
#define mmDCRX_PHY_MACRO_CNTL_RESERVED53 0x5ab9
#define mmDCRX_PHY_MACRO_CNTL_RESERVED54 0x5aba
#define mmDCRX_PHY_MACRO_CNTL_RESERVED55 0x5abb
#define mmDCRX_PHY_MACRO_CNTL_RESERVED56 0x5abc
#define mmDCRX_PHY_MACRO_CNTL_RESERVED57 0x5abd
#define mmDCRX_PHY_MACRO_CNTL_RESERVED58 0x5abe
#define mmDCRX_PHY_MACRO_CNTL_RESERVED59 0x5abf
#define mmDCRX_PHY_MACRO_CNTL_RESERVED60 0x5ac0
#define mmDCRX_PHY_MACRO_CNTL_RESERVED61 0x5ac1
#define mmDCRX_PHY_MACRO_CNTL_RESERVED62 0x5ac2
#define mmDCRX_PHY_MACRO_CNTL_RESERVED63 0x5ac3
#define mmDCRX_PHY_MACRO_CNTL_RESERVED64 0x5ac4
#define mmDCRX_PHY_MACRO_CNTL_RESERVED65 0x5ac5
#define mmDCRX_PHY_MACRO_CNTL_RESERVED66 0x5ac6
#define mmDCRX_PHY_MACRO_CNTL_RESERVED67 0x5ac7
#define mmDCRX_PHY_MACRO_CNTL_RESERVED68 0x5ac8
#define mmDCRX_PHY_MACRO_CNTL_RESERVED69 0x5ac9
#define mmDCRX_PHY_MACRO_CNTL_RESERVED70 0x5aca
#define mmDCRX_PHY_MACRO_CNTL_RESERVED71 0x5acb
#define mmDCRX_PHY_MACRO_CNTL_RESERVED72 0x5acc
#define mmDCRX_PHY_MACRO_CNTL_RESERVED73 0x5acd
#define mmDCRX_PHY_MACRO_CNTL_RESERVED74 0x5ace
#define mmDCRX_PHY_MACRO_CNTL_RESERVED75 0x5acf
#define mmDCRX_PHY_MACRO_CNTL_RESERVED76 0x5ad0
#define mmDCRX_PHY_MACRO_CNTL_RESERVED77 0x5ad1
#define mmDCRX_PHY_MACRO_CNTL_RESERVED78 0x5ad2
#define mmDCRX_PHY_MACRO_CNTL_RESERVED79 0x5ad3
#define mmDCRX_PHY_MACRO_CNTL_RESERVED80 0x5ad4
#define mmDCRX_PHY_MACRO_CNTL_RESERVED81 0x5ad5
#define mmDCRX_PHY_MACRO_CNTL_RESERVED82 0x5ad6
#define mmDCRX_PHY_MACRO_CNTL_RESERVED83 0x5ad7
#define mmDCRX_PHY_MACRO_CNTL_RESERVED84 0x5ad8
#define mmDCRX_PHY_MACRO_CNTL_RESERVED85 0x5ad9
#define mmDCRX_PHY_MACRO_CNTL_RESERVED86 0x5ada
#define mmDCRX_PHY_MACRO_CNTL_RESERVED87 0x5adb
#define mmDCRX_PHY_MACRO_CNTL_RESERVED88 0x5adc
#define mmDCRX_PHY_MACRO_CNTL_RESERVED89 0x5add
#define mmDCRX_PHY_MACRO_CNTL_RESERVED90 0x5ade
#define mmDCRX_PHY_MACRO_CNTL_RESERVED91 0x5adf
#define mmDCRX_PHY_MACRO_CNTL_RESERVED92 0x5ae0
#define mmDCRX_PHY_MACRO_CNTL_RESERVED93 0x5ae1
#define mmDCRX_PHY_MACRO_CNTL_RESERVED94 0x5ae2
#define mmDCRX_PHY_MACRO_CNTL_RESERVED95 0x5ae3
#define mmDCRX_PHY_MACRO_CNTL_RESERVED96 0x5ae4
#define mmDCRX_PHY_MACRO_CNTL_RESERVED97 0x5ae5
#define mmDCRX_PHY_MACRO_CNTL_RESERVED98 0x5ae6
#define mmDCRX_PHY_MACRO_CNTL_RESERVED99 0x5ae7
#define mmDCRX_PHY_MACRO_CNTL_RESERVED100 0x5ae8
#define mmDCRX_PHY_MACRO_CNTL_RESERVED101 0x5ae9
#define mmDCRX_PHY_MACRO_CNTL_RESERVED102 0x5aea
#define mmDCRX_PHY_MACRO_CNTL_RESERVED103 0x5aeb
#define mmDCRX_PHY_MACRO_CNTL_RESERVED104 0x5aec
#define mmDCRX_PHY_MACRO_CNTL_RESERVED105 0x5aed
#define mmDCRX_PHY_MACRO_CNTL_RESERVED106 0x5aee
#define mmDCRX_PHY_MACRO_CNTL_RESERVED107 0x5aef
#define mmDCRX_PHY_MACRO_CNTL_RESERVED108 0x5af0
#define mmDCRX_PHY_MACRO_CNTL_RESERVED109 0x5af1
#define mmDCRX_PHY_MACRO_CNTL_RESERVED110 0x5af2
#define mmDCRX_PHY_MACRO_CNTL_RESERVED111 0x5af3
#define mmDCRX_PHY_MACRO_CNTL_RESERVED112 0x5af4
#define mmDCRX_PHY_MACRO_CNTL_RESERVED113 0x5af5
#define mmDCRX_PHY_MACRO_CNTL_RESERVED114 0x5af6
#define mmDCRX_PHY_MACRO_CNTL_RESERVED115 0x5af7
#define mmDCRX_PHY_MACRO_CNTL_RESERVED116 0x5af8
#define mmDCRX_PHY_MACRO_CNTL_RESERVED117 0x5af9
#define mmDCRX_PHY_MACRO_CNTL_RESERVED118 0x5afa
#define mmDCRX_PHY_MACRO_CNTL_RESERVED119 0x5afb
#define mmDCRX_PHY_MACRO_CNTL_RESERVED120 0x5afc
#define mmDCRX_PHY_MACRO_CNTL_RESERVED121 0x5afd
#define mmDCRX_PHY_MACRO_CNTL_RESERVED122 0x5afe
#define mmDCRX_PHY_MACRO_CNTL_RESERVED123 0x5aff
#define mmDCRX_PHY_MACRO_CNTL_RESERVED124 0x5b00
#define mmDCRX_PHY_MACRO_CNTL_RESERVED125 0x5b01
#define mmDCRX_PHY_MACRO_CNTL_RESERVED126 0x5b02
#define mmDCRX_PHY_MACRO_CNTL_RESERVED127 0x5b03
#define mmDCRX_PHY_MACRO_CNTL_RESERVED128 0x5b04
#define mmDCRX_PHY_MACRO_CNTL_RESERVED129 0x5b05
#define mmDCRX_PHY_MACRO_CNTL_RESERVED130 0x5b06
#define mmDCRX_PHY_MACRO_CNTL_RESERVED131 0x5b07
#define mmDCRX_PHY_MACRO_CNTL_RESERVED132 0x5b08
#define mmDCRX_PHY_MACRO_CNTL_RESERVED133 0x5b09
#define mmDCRX_PHY_MACRO_CNTL_RESERVED134 0x5b0a
#define mmDCRX_PHY_MACRO_CNTL_RESERVED135 0x5b0b
#define mmDCRX_PHY_MACRO_CNTL_RESERVED136 0x5b0c
#define mmDCRX_PHY_MACRO_CNTL_RESERVED137 0x5b0d
#define mmDCRX_PHY_MACRO_CNTL_RESERVED138 0x5b0e
#define mmDCRX_PHY_MACRO_CNTL_RESERVED139 0x5b0f
#define mmDCRX_PHY_MACRO_CNTL_RESERVED140 0x5b10
#define mmDCRX_PHY_MACRO_CNTL_RESERVED141 0x5b11
#define mmDCRX_PHY_MACRO_CNTL_RESERVED142 0x5b12
#define mmDCRX_PHY_MACRO_CNTL_RESERVED143 0x5b13
#define mmDCRX_PHY_MACRO_CNTL_RESERVED144 0x5b14
#define mmDCRX_PHY_MACRO_CNTL_RESERVED145 0x5b15
#define mmDCRX_PHY_MACRO_CNTL_RESERVED146 0x5b16
#define mmDCRX_PHY_MACRO_CNTL_RESERVED147 0x5b17
#define mmDCRX_PHY_MACRO_CNTL_RESERVED148 0x5b18
#define mmDCRX_PHY_MACRO_CNTL_RESERVED149 0x5b19
#define mmDCRX_PHY_MACRO_CNTL_RESERVED150 0x5b1a
#define mmDCRX_PHY_MACRO_CNTL_RESERVED151 0x5b1b
#define mmDCRX_PHY_MACRO_CNTL_RESERVED152 0x5b1c
#define mmDCRX_PHY_MACRO_CNTL_RESERVED153 0x5b1d
#define mmDCRX_PHY_MACRO_CNTL_RESERVED154 0x5b1e
#define mmDCRX_PHY_MACRO_CNTL_RESERVED155 0x5b1f
#define mmDCRX_PHY_MACRO_CNTL_RESERVED156 0x5b20
#define mmDCRX_PHY_MACRO_CNTL_RESERVED157 0x5b21
#define mmDCRX_PHY_MACRO_CNTL_RESERVED158 0x5b22
#define mmDCRX_PHY_MACRO_CNTL_RESERVED159 0x5b23
#define mmDCRX_PHY_MACRO_CNTL_RESERVED160 0x5b24
#define mmDCRX_PHY_MACRO_CNTL_RESERVED161 0x5b25
#define mmDCRX_PHY_MACRO_CNTL_RESERVED162 0x5b26
#define mmDCRX_PHY_MACRO_CNTL_RESERVED163 0x5b27
#define mmDCRX_PHY_MACRO_CNTL_RESERVED164 0x5b28
#define mmDCRX_PHY_MACRO_CNTL_RESERVED165 0x5b29
#define mmDCRX_PHY_MACRO_CNTL_RESERVED166 0x5b2a
#define mmDCRX_PHY_MACRO_CNTL_RESERVED167 0x5b2b
#define mmDCRX_PHY_MACRO_CNTL_RESERVED168 0x5b2c
#define mmDCRX_PHY_MACRO_CNTL_RESERVED169 0x5b2d
#define mmDCRX_PHY_MACRO_CNTL_RESERVED170 0x5b2e
#define mmDCRX_PHY_MACRO_CNTL_RESERVED171 0x5b2f
#define mmDCRX_PHY_MACRO_CNTL_RESERVED172 0x5b30
#define mmDCRX_PHY_MACRO_CNTL_RESERVED173 0x5b31
#define mmDCRX_PHY_MACRO_CNTL_RESERVED174 0x5b32
#define mmDCRX_PHY_MACRO_CNTL_RESERVED175 0x5b33
#define mmDCRX_PHY_MACRO_CNTL_RESERVED176 0x5b34
#define mmDCRX_PHY_MACRO_CNTL_RESERVED177 0x5b35
#define mmDCRX_PHY_MACRO_CNTL_RESERVED178 0x5b36
#define mmDCRX_PHY_MACRO_CNTL_RESERVED179 0x5b37
#define mmDCRX_PHY_MACRO_CNTL_RESERVED180 0x5b38
#define mmDCRX_PHY_MACRO_CNTL_RESERVED181 0x5b39
#define mmDCRX_PHY_MACRO_CNTL_RESERVED182 0x5b3a
#define mmDCRX_PHY_MACRO_CNTL_RESERVED183 0x5b3b
#define mmDCRX_PHY_MACRO_CNTL_RESERVED184 0x5b3c
#define mmDCRX_PHY_MACRO_CNTL_RESERVED185 0x5b3d
#define mmDCRX_PHY_MACRO_CNTL_RESERVED186 0x5b3e
#define mmDCRX_PHY_MACRO_CNTL_RESERVED187 0x5b3f
#define mmDCRX_PHY_MACRO_CNTL_RESERVED188 0x5b40
#define mmDCRX_PHY_MACRO_CNTL_RESERVED189 0x5b41
#define mmDCRX_PHY_MACRO_CNTL_RESERVED190 0x5b42
#define mmDCRX_PHY_MACRO_CNTL_RESERVED191 0x5b43
#define mmDCRX_PHY_MACRO_CNTL_RESERVED192 0x5b44
#define mmDCRX_PHY_MACRO_CNTL_RESERVED193 0x5b45
#define mmDCRX_PHY_MACRO_CNTL_RESERVED194 0x5b46
#define mmDCRX_PHY_MACRO_CNTL_RESERVED195 0x5b47
#define mmDCRX_PHY_MACRO_CNTL_RESERVED196 0x5b48
#define mmDCRX_PHY_MACRO_CNTL_RESERVED197 0x5b49
#define mmDCRX_PHY_MACRO_CNTL_RESERVED198 0x5b4a
#define mmDCRX_PHY_MACRO_CNTL_RESERVED199 0x5b4b
#define mmDCRX_PHY_MACRO_CNTL_RESERVED200 0x5b4c
#define mmDCRX_PHY_MACRO_CNTL_RESERVED201 0x5b4d
#define mmDCRX_PHY_MACRO_CNTL_RESERVED202 0x5b4e
#define mmDCRX_PHY_MACRO_CNTL_RESERVED203 0x5b4f
#define mmDCRX_PHY_MACRO_CNTL_RESERVED204 0x5b50
#define mmDCRX_PHY_MACRO_CNTL_RESERVED205 0x5b51
#define mmDCRX_PHY_MACRO_CNTL_RESERVED206 0x5b52
#define mmDCRX_PHY_MACRO_CNTL_RESERVED207 0x5b53
#define mmDCRX_PHY_MACRO_CNTL_RESERVED208 0x5b54
#define mmDCRX_PHY_MACRO_CNTL_RESERVED209 0x5b55
#define mmDCRX_PHY_MACRO_CNTL_RESERVED210 0x5b56
#define mmDCRX_PHY_MACRO_CNTL_RESERVED211 0x5b57
#define mmDCRX_PHY_MACRO_CNTL_RESERVED212 0x5b58
#define mmDCRX_PHY_MACRO_CNTL_RESERVED213 0x5b59
#define mmDCRX_PHY_MACRO_CNTL_RESERVED214 0x5b5a
#define mmDCRX_PHY_MACRO_CNTL_RESERVED215 0x5b5b
#define mmDCRX_PHY_MACRO_CNTL_RESERVED216 0x5b5c
#define mmDCRX_PHY_MACRO_CNTL_RESERVED217 0x5b5d
#define mmDCRX_PHY_MACRO_CNTL_RESERVED218 0x5b5e
#define mmDCRX_PHY_MACRO_CNTL_RESERVED219 0x5b5f
#define mmDCRX_PHY_MACRO_CNTL_RESERVED220 0x5b60
#define mmDCRX_PHY_MACRO_CNTL_RESERVED221 0x5b61
#define mmDCRX_PHY_MACRO_CNTL_RESERVED222 0x5b62
#define mmDCRX_PHY_MACRO_CNTL_RESERVED223 0x5b63
#define mmDCRX_PHY_MACRO_CNTL_RESERVED224 0x5b64
#define mmDCRX_PHY_MACRO_CNTL_RESERVED225 0x5b65
#define mmDCRX_PHY_MACRO_CNTL_RESERVED226 0x5b66
#define mmDCRX_PHY_MACRO_CNTL_RESERVED227 0x5b67
#define mmDCRX_PHY_MACRO_CNTL_RESERVED228 0x5b68
#define mmDCRX_PHY_MACRO_CNTL_RESERVED229 0x5b69
#define mmDCRX_PHY_MACRO_CNTL_RESERVED230 0x5b6a
#define mmDCRX_PHY_MACRO_CNTL_RESERVED231 0x5b6b
#define mmDCRX_PHY_MACRO_CNTL_RESERVED232 0x5b6c
#define mmDCRX_PHY_MACRO_CNTL_RESERVED233 0x5b6d
#define mmDCRX_PHY_MACRO_CNTL_RESERVED234 0x5b6e
#define mmDCRX_PHY_MACRO_CNTL_RESERVED235 0x5b6f
#define mmDCRX_PHY_MACRO_CNTL_RESERVED236 0x5b70
#define mmDCRX_PHY_MACRO_CNTL_RESERVED237 0x5b71
#define mmDCRX_PHY_MACRO_CNTL_RESERVED238 0x5b72
#define mmDCRX_PHY_MACRO_CNTL_RESERVED239 0x5b73
#define mmDCRX_PHY_MACRO_CNTL_RESERVED240 0x5b74
#define mmDCRX_PHY_MACRO_CNTL_RESERVED241 0x5b75
#define mmDCRX_PHY_MACRO_CNTL_RESERVED242 0x5b76
#define mmDCRX_PHY_MACRO_CNTL_RESERVED243 0x5b77
#define mmDCRX_PHY_MACRO_CNTL_RESERVED244 0x5b78
#define mmDCRX_PHY_MACRO_CNTL_RESERVED245 0x5b79
#define mmDCRX_PHY_MACRO_CNTL_RESERVED246 0x5b7a
#define mmDCRX_PHY_MACRO_CNTL_RESERVED247 0x5b7b
#define mmDCRX_PHY_MACRO_CNTL_RESERVED248 0x5b7c
#define mmDCRX_PHY_MACRO_CNTL_RESERVED249 0x5b7d
#define mmDCRX_PHY_MACRO_CNTL_RESERVED250 0x5b7e
#define mmDCRX_PHY_MACRO_CNTL_RESERVED251 0x5b7f
#define mmDCRX_PHY_MACRO_CNTL_RESERVED252 0x5b80
#define mmDCRX_PHY_MACRO_CNTL_RESERVED253 0x5b81
#define mmDCRX_PHY_MACRO_CNTL_RESERVED254 0x5b82
#define mmDCRX_PHY_MACRO_CNTL_RESERVED255 0x5b83
#define mmDCRX_PHY_MACRO_CNTL_RESERVED256 0x5b84
#define mmDCRX_PHY_MACRO_CNTL_RESERVED257 0x5b85
#define mmDCRX_PHY_MACRO_CNTL_RESERVED258 0x5b86
#define mmDCRX_PHY_MACRO_CNTL_RESERVED259 0x5b87
#define mmDCRX_PHY_MACRO_CNTL_RESERVED260 0x5b88
#define mmDCRX_PHY_MACRO_CNTL_RESERVED261 0x5b89
#define mmDCRX_PHY_MACRO_CNTL_RESERVED262 0x5b8a
#define mmDCRX_PHY_MACRO_CNTL_RESERVED263 0x5b8b
#define mmDCRX_PHY_MACRO_CNTL_RESERVED264 0x5b8c
#define mmDCRX_PHY_MACRO_CNTL_RESERVED265 0x5b8d
#define mmDCRX_PHY_MACRO_CNTL_RESERVED266 0x5b8e
#define mmDCRX_PHY_MACRO_CNTL_RESERVED267 0x5b8f
#define mmDCRX_PHY_MACRO_CNTL_RESERVED268 0x5b90
#define mmDCRX_PHY_MACRO_CNTL_RESERVED269 0x5b91
#define mmDCRX_PHY_MACRO_CNTL_RESERVED270 0x5b92
#define mmDCRX_PHY_MACRO_CNTL_RESERVED271 0x5b93
#define mmDCRX_PHY_MACRO_CNTL_RESERVED272 0x5b94
#define mmDCRX_PHY_MACRO_CNTL_RESERVED273 0x5b95
#define mmDCRX_PHY_MACRO_CNTL_RESERVED274 0x5b96
#define mmDCRX_PHY_MACRO_CNTL_RESERVED275 0x5b97
#define mmDCRX_PHY_MACRO_CNTL_RESERVED276 0x5b98
#define mmDCRX_PHY_MACRO_CNTL_RESERVED277 0x5b99
#define mmDCRX_PHY_MACRO_CNTL_RESERVED278 0x5b9a
#define mmDCRX_PHY_MACRO_CNTL_RESERVED279 0x5b9b
#define mmDCRX_PHY_MACRO_CNTL_RESERVED280 0x5b9c
#define mmDCRX_PHY_MACRO_CNTL_RESERVED281 0x5b9d
#define mmDCRX_PHY_MACRO_CNTL_RESERVED282 0x5b9e
#define mmDCRX_PHY_MACRO_CNTL_RESERVED283 0x5b9f
#define mmDCRX_PHY_MACRO_CNTL_RESERVED284 0x5ba0
#define mmDCRX_PHY_MACRO_CNTL_RESERVED285 0x5ba1
#define mmDCRX_PHY_MACRO_CNTL_RESERVED286 0x5ba2
#define mmDCRX_PHY_MACRO_CNTL_RESERVED287 0x5ba3
#define mmDCRX_PHY_MACRO_CNTL_RESERVED288 0x5ba4
#define mmDCRX_PHY_MACRO_CNTL_RESERVED289 0x5ba5
#define mmDCRX_PHY_MACRO_CNTL_RESERVED290 0x5ba6
#define mmDCRX_PHY_MACRO_CNTL_RESERVED291 0x5ba7
#define mmDCRX_PHY_MACRO_CNTL_RESERVED292 0x5ba8
#define mmDCRX_PHY_MACRO_CNTL_RESERVED293 0x5ba9
#define mmDCRX_PHY_MACRO_CNTL_RESERVED294 0x5baa
#define mmDCRX_PHY_MACRO_CNTL_RESERVED295 0x5bab
#define mmDCRX_PHY_MACRO_CNTL_RESERVED296 0x5bac
#define mmDCRX_PHY_MACRO_CNTL_RESERVED297 0x5bad
#define mmDCRX_PHY_MACRO_CNTL_RESERVED298 0x5bae
#define mmDCRX_PHY_MACRO_CNTL_RESERVED299 0x5baf
#define mmDCRX_PHY_MACRO_CNTL_RESERVED300 0x5bb0
#define mmDCRX_PHY_MACRO_CNTL_RESERVED301 0x5bb1
#define mmDCRX_PHY_MACRO_CNTL_RESERVED302 0x5bb2
#define mmDCRX_PHY_MACRO_CNTL_RESERVED303 0x5bb3
#define mmDCRX_PHY_MACRO_CNTL_RESERVED304 0x5bb4
#define mmDCRX_PHY_MACRO_CNTL_RESERVED305 0x5bb5
#define mmDCRX_PHY_MACRO_CNTL_RESERVED306 0x5bb6
#define mmDCRX_PHY_MACRO_CNTL_RESERVED307 0x5bb7
#define mmDCRX_PHY_MACRO_CNTL_RESERVED308 0x5bb8
#define mmDCRX_PHY_MACRO_CNTL_RESERVED309 0x5bb9
#define mmDCRX_PHY_MACRO_CNTL_RESERVED310 0x5bba
#define mmDCRX_PHY_MACRO_CNTL_RESERVED311 0x5bbb
#define mmDCRX_PHY_MACRO_CNTL_RESERVED312 0x5bbc
#define mmDCRX_PHY_MACRO_CNTL_RESERVED313 0x5bbd
#define mmDCRX_PHY_MACRO_CNTL_RESERVED314 0x5bbe
#define mmDCRX_PHY_MACRO_CNTL_RESERVED315 0x5bbf
#define mmDCRX_PHY_MACRO_CNTL_RESERVED316 0x5bc0
#define mmDCRX_PHY_MACRO_CNTL_RESERVED317 0x5bc1
#define mmDCRX_PHY_MACRO_CNTL_RESERVED318 0x5bc2
#define mmDCRX_PHY_MACRO_CNTL_RESERVED319 0x5bc3
#define mmDCRX_PHY_MACRO_CNTL_RESERVED320 0x5bc4
#define mmDCRX_PHY_MACRO_CNTL_RESERVED321 0x5bc5
#define mmDCRX_PHY_MACRO_CNTL_RESERVED322 0x5bc6
#define mmDCRX_PHY_MACRO_CNTL_RESERVED323 0x5bc7
#define mmDCRX_PHY_MACRO_CNTL_RESERVED324 0x5bc8
#define mmDCRX_PHY_MACRO_CNTL_RESERVED325 0x5bc9
#define mmDCRX_PHY_MACRO_CNTL_RESERVED326 0x5bca
#define mmDCRX_PHY_MACRO_CNTL_RESERVED327 0x5bcb
#define mmDCRX_PHY_MACRO_CNTL_RESERVED328 0x5bcc
#define mmDCRX_PHY_MACRO_CNTL_RESERVED329 0x5bcd
#define mmDCRX_PHY_MACRO_CNTL_RESERVED330 0x5bce
#define mmDCRX_PHY_MACRO_CNTL_RESERVED331 0x5bcf
#define mmDCRX_PHY_MACRO_CNTL_RESERVED332 0x5bd0
#define mmDCRX_PHY_MACRO_CNTL_RESERVED333 0x5bd1
#define mmDCRX_PHY_MACRO_CNTL_RESERVED334 0x5bd2
#define mmDCRX_PHY_MACRO_CNTL_RESERVED335 0x5bd3
#define mmDCRX_PHY_MACRO_CNTL_RESERVED336 0x5bd4
#define mmDCRX_PHY_MACRO_CNTL_RESERVED337 0x5bd5
#define mmDCRX_PHY_MACRO_CNTL_RESERVED338 0x5bd6
#define mmDCRX_PHY_MACRO_CNTL_RESERVED339 0x5bd7
#define mmDCRX_PHY_MACRO_CNTL_RESERVED340 0x5bd8
#define mmDCRX_PHY_MACRO_CNTL_RESERVED341 0x5bd9
#define mmDCRX_PHY_MACRO_CNTL_RESERVED342 0x5bda
#define mmDCRX_PHY_MACRO_CNTL_RESERVED343 0x5bdb
#define mmDCRX_PHY_MACRO_CNTL_RESERVED344 0x5bdc
#define mmDCRX_PHY_MACRO_CNTL_RESERVED345 0x5bdd
#define mmDCRX_PHY_MACRO_CNTL_RESERVED346 0x5bde
#define mmDCRX_PHY_MACRO_CNTL_RESERVED347 0x5bdf
#define mmDCRX_PHY_MACRO_CNTL_RESERVED348 0x5be0
#define mmDCRX_PHY_MACRO_CNTL_RESERVED349 0x5be1
#define mmDCRX_PHY_MACRO_CNTL_RESERVED350 0x5be2
#define mmDCRX_PHY_MACRO_CNTL_RESERVED351 0x5be3
#define mmDCRX_PHY_MACRO_CNTL_RESERVED352 0x5be4
#define mmDCRX_PHY_MACRO_CNTL_RESERVED353 0x5be5
#define mmDCRX_PHY_MACRO_CNTL_RESERVED354 0x5be6
#define mmDCRX_PHY_MACRO_CNTL_RESERVED355 0x5be7
#define mmDCRX_PHY_MACRO_CNTL_RESERVED356 0x5be8
#define mmDCRX_PHY_MACRO_CNTL_RESERVED357 0x5be9
#define mmDCRX_PHY_MACRO_CNTL_RESERVED358 0x5bea
#define mmDCRX_PHY_MACRO_CNTL_RESERVED359 0x5beb
#define mmDCRX_PHY_MACRO_CNTL_RESERVED360 0x5bec
#define mmDCRX_PHY_MACRO_CNTL_RESERVED361 0x5bed
#define mmDCRX_PHY_MACRO_CNTL_RESERVED362 0x5bee
#define mmDCRX_PHY_MACRO_CNTL_RESERVED363 0x5bef
#define mmDCRX_PHY_MACRO_CNTL_RESERVED364 0x5bf0
#define mmDCRX_PHY_MACRO_CNTL_RESERVED365 0x5bf1
#define mmDCRX_PHY_MACRO_CNTL_RESERVED366 0x5bf2
#define mmDCRX_PHY_MACRO_CNTL_RESERVED367 0x5bf3
#define mmDCRX_PHY_MACRO_CNTL_RESERVED368 0x5bf4
#define mmDCRX_PHY_MACRO_CNTL_RESERVED369 0x5bf5
#define mmDCRX_PHY_MACRO_CNTL_RESERVED370 0x5bf6
#define mmDCRX_PHY_MACRO_CNTL_RESERVED371 0x5bf7
#define mmDCRX_PHY_MACRO_CNTL_RESERVED372 0x5bf8
#define mmDCRX_PHY_MACRO_CNTL_RESERVED373 0x5bf9
#define mmDCRX_PHY_MACRO_CNTL_RESERVED374 0x5bfa
#define mmDCRX_PHY_MACRO_CNTL_RESERVED375 0x5bfb
#define mmDCRX_PHY_MACRO_CNTL_RESERVED376 0x5bfc
#define mmDCRX_PHY_MACRO_CNTL_RESERVED377 0x5bfd
#define mmDCRX_PHY_MACRO_CNTL_RESERVED378 0x5bfe
#define mmDCRX_PHY_MACRO_CNTL_RESERVED379 0x5bff
#define mmDPHY_MACRO_CNTL_RESERVED0 0x5d98
#define mmDPHY_MACRO_CNTL_RESERVED1 0x5d99
#define mmDPHY_MACRO_CNTL_RESERVED2 0x5d9a
#define mmDPHY_MACRO_CNTL_RESERVED3 0x5d9b
#define mmDPHY_MACRO_CNTL_RESERVED4 0x5d9c
#define mmDPHY_MACRO_CNTL_RESERVED5 0x5d9d
#define mmDPHY_MACRO_CNTL_RESERVED6 0x5d9e
#define mmDPHY_MACRO_CNTL_RESERVED7 0x5d9f
#define mmDPHY_MACRO_CNTL_RESERVED8 0x5da0
#define mmDPHY_MACRO_CNTL_RESERVED9 0x5da1
#define mmDPHY_MACRO_CNTL_RESERVED10 0x5da2
#define mmDPHY_MACRO_CNTL_RESERVED11 0x5da3
#define mmDPHY_MACRO_CNTL_RESERVED12 0x5da4
#define mmDPHY_MACRO_CNTL_RESERVED13 0x5da5
#define mmDPHY_MACRO_CNTL_RESERVED14 0x5da6
#define mmDPHY_MACRO_CNTL_RESERVED15 0x5da7
#define mmDPHY_MACRO_CNTL_RESERVED16 0x5da8
#define mmDPHY_MACRO_CNTL_RESERVED17 0x5da9
#define mmDPHY_MACRO_CNTL_RESERVED18 0x5daa
#define mmDPHY_MACRO_CNTL_RESERVED19 0x5dab
#define mmDPHY_MACRO_CNTL_RESERVED20 0x5dac
#define mmDPHY_MACRO_CNTL_RESERVED21 0x5dad
#define mmDPHY_MACRO_CNTL_RESERVED22 0x5dae
#define mmDPHY_MACRO_CNTL_RESERVED23 0x5daf
#define mmDPHY_MACRO_CNTL_RESERVED24 0x5db0
#define mmDPHY_MACRO_CNTL_RESERVED25 0x5db1
#define mmDPHY_MACRO_CNTL_RESERVED26 0x5db2
#define mmDPHY_MACRO_CNTL_RESERVED27 0x5db3
#define mmDPHY_MACRO_CNTL_RESERVED28 0x5db4
#define mmDPHY_MACRO_CNTL_RESERVED29 0x5db5
#define mmDPHY_MACRO_CNTL_RESERVED30 0x5db6
#define mmDPHY_MACRO_CNTL_RESERVED31 0x5db7
#define mmDPHY_MACRO_CNTL_RESERVED32 0x5db8
#define mmDPHY_MACRO_CNTL_RESERVED33 0x5db9
#define mmDPHY_MACRO_CNTL_RESERVED34 0x5dba
#define mmDPHY_MACRO_CNTL_RESERVED35 0x5dbb
#define mmDPHY_MACRO_CNTL_RESERVED36 0x5dbc
#define mmDPHY_MACRO_CNTL_RESERVED37 0x5dbd
#define mmDPHY_MACRO_CNTL_RESERVED38 0x5dbe
#define mmDPHY_MACRO_CNTL_RESERVED39 0x5dbf
#define mmDPHY_MACRO_CNTL_RESERVED40 0x5dc0
#define mmDPHY_MACRO_CNTL_RESERVED41 0x5dc1
#define mmDPHY_MACRO_CNTL_RESERVED42 0x5dc2
#define mmDPHY_MACRO_CNTL_RESERVED43 0x5dc3
#define mmDPHY_MACRO_CNTL_RESERVED44 0x5dc4
#define mmDPHY_MACRO_CNTL_RESERVED45 0x5dc5
#define mmDPHY_MACRO_CNTL_RESERVED46 0x5dc6
#define mmDPHY_MACRO_CNTL_RESERVED47 0x5dc7
#define mmDPHY_MACRO_CNTL_RESERVED48 0x5dc8
#define mmDPHY_MACRO_CNTL_RESERVED49 0x5dc9
#define mmDPHY_MACRO_CNTL_RESERVED50 0x5dca
#define mmDPHY_MACRO_CNTL_RESERVED51 0x5dcb
#define mmDPHY_MACRO_CNTL_RESERVED52 0x5dcc
#define mmDPHY_MACRO_CNTL_RESERVED53 0x5dcd
#define mmDPHY_MACRO_CNTL_RESERVED54 0x5dce
#define mmDPHY_MACRO_CNTL_RESERVED55 0x5dcf
#define mmDPHY_MACRO_CNTL_RESERVED56 0x5dd0
#define mmDPHY_MACRO_CNTL_RESERVED57 0x5dd1
#define mmDPHY_MACRO_CNTL_RESERVED58 0x5dd2
#define mmDPHY_MACRO_CNTL_RESERVED59 0x5dd3
#define mmDPHY_MACRO_CNTL_RESERVED60 0x5dd4
#define mmDPHY_MACRO_CNTL_RESERVED61 0x5dd5
#define mmDPHY_MACRO_CNTL_RESERVED62 0x5dd6
#define mmDPHY_MACRO_CNTL_RESERVED63 0x5dd7
#define mmGRPH_ENABLE 0x1a00
#define mmDCP0_GRPH_ENABLE 0x1a00
#define mmDCP1_GRPH_ENABLE 0x1c00
#define mmDCP2_GRPH_ENABLE 0x1e00
#define mmDCP3_GRPH_ENABLE 0x4000
#define mmDCP4_GRPH_ENABLE 0x4200
#define mmDCP5_GRPH_ENABLE 0x4400
#define mmGRPH_CONTROL 0x1a01
#define mmDCP0_GRPH_CONTROL 0x1a01
#define mmDCP1_GRPH_CONTROL 0x1c01
#define mmDCP2_GRPH_CONTROL 0x1e01
#define mmDCP3_GRPH_CONTROL 0x4001
#define mmDCP4_GRPH_CONTROL 0x4201
#define mmDCP5_GRPH_CONTROL 0x4401
#define mmGRPH_LUT_10BIT_BYPASS 0x1a02
#define mmDCP0_GRPH_LUT_10BIT_BYPASS 0x1a02
#define mmDCP1_GRPH_LUT_10BIT_BYPASS 0x1c02
#define mmDCP2_GRPH_LUT_10BIT_BYPASS 0x1e02
#define mmDCP3_GRPH_LUT_10BIT_BYPASS 0x4002
#define mmDCP4_GRPH_LUT_10BIT_BYPASS 0x4202
#define mmDCP5_GRPH_LUT_10BIT_BYPASS 0x4402
#define mmGRPH_SWAP_CNTL 0x1a03
#define mmDCP0_GRPH_SWAP_CNTL 0x1a03
#define mmDCP1_GRPH_SWAP_CNTL 0x1c03
#define mmDCP2_GRPH_SWAP_CNTL 0x1e03
#define mmDCP3_GRPH_SWAP_CNTL 0x4003
#define mmDCP4_GRPH_SWAP_CNTL 0x4203
#define mmDCP5_GRPH_SWAP_CNTL 0x4403
#define mmGRPH_PRIMARY_SURFACE_ADDRESS 0x1a04
#define mmDCP0_GRPH_PRIMARY_SURFACE_ADDRESS 0x1a04
#define mmDCP1_GRPH_PRIMARY_SURFACE_ADDRESS 0x1c04
#define mmDCP2_GRPH_PRIMARY_SURFACE_ADDRESS 0x1e04
#define mmDCP3_GRPH_PRIMARY_SURFACE_ADDRESS 0x4004
#define mmDCP4_GRPH_PRIMARY_SURFACE_ADDRESS 0x4204
#define mmDCP5_GRPH_PRIMARY_SURFACE_ADDRESS 0x4404
#define mmGRPH_SECONDARY_SURFACE_ADDRESS 0x1a05
#define mmDCP0_GRPH_SECONDARY_SURFACE_ADDRESS 0x1a05
#define mmDCP1_GRPH_SECONDARY_SURFACE_ADDRESS 0x1c05
#define mmDCP2_GRPH_SECONDARY_SURFACE_ADDRESS 0x1e05
#define mmDCP3_GRPH_SECONDARY_SURFACE_ADDRESS 0x4005
#define mmDCP4_GRPH_SECONDARY_SURFACE_ADDRESS 0x4205
#define mmDCP5_GRPH_SECONDARY_SURFACE_ADDRESS 0x4405
#define mmGRPH_PITCH 0x1a06
#define mmDCP0_GRPH_PITCH 0x1a06
#define mmDCP1_GRPH_PITCH 0x1c06
#define mmDCP2_GRPH_PITCH 0x1e06
#define mmDCP3_GRPH_PITCH 0x4006
#define mmDCP4_GRPH_PITCH 0x4206
#define mmDCP5_GRPH_PITCH 0x4406
#define mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x1a07
#define mmDCP0_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x1a07
#define mmDCP1_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x1c07
#define mmDCP2_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x1e07
#define mmDCP3_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x4007
#define mmDCP4_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x4207
#define mmDCP5_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x4407
#define mmGRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0x1a08
#define mmDCP0_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0x1a08
#define mmDCP1_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0x1c08
#define mmDCP2_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0x1e08
#define mmDCP3_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0x4008
#define mmDCP4_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0x4208
#define mmDCP5_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0x4408
#define mmGRPH_SURFACE_OFFSET_X 0x1a09
#define mmDCP0_GRPH_SURFACE_OFFSET_X 0x1a09
#define mmDCP1_GRPH_SURFACE_OFFSET_X 0x1c09
#define mmDCP2_GRPH_SURFACE_OFFSET_X 0x1e09
#define mmDCP3_GRPH_SURFACE_OFFSET_X 0x4009
#define mmDCP4_GRPH_SURFACE_OFFSET_X 0x4209
#define mmDCP5_GRPH_SURFACE_OFFSET_X 0x4409
#define mmGRPH_SURFACE_OFFSET_Y 0x1a0a
#define mmDCP0_GRPH_SURFACE_OFFSET_Y 0x1a0a
#define mmDCP1_GRPH_SURFACE_OFFSET_Y 0x1c0a
#define mmDCP2_GRPH_SURFACE_OFFSET_Y 0x1e0a
#define mmDCP3_GRPH_SURFACE_OFFSET_Y 0x400a
#define mmDCP4_GRPH_SURFACE_OFFSET_Y 0x420a
#define mmDCP5_GRPH_SURFACE_OFFSET_Y 0x440a
#define mmGRPH_X_START 0x1a0b
#define mmDCP0_GRPH_X_START 0x1a0b
#define mmDCP1_GRPH_X_START 0x1c0b
#define mmDCP2_GRPH_X_START 0x1e0b
#define mmDCP3_GRPH_X_START 0x400b
#define mmDCP4_GRPH_X_START 0x420b
#define mmDCP5_GRPH_X_START 0x440b
#define mmGRPH_Y_START 0x1a0c
#define mmDCP0_GRPH_Y_START 0x1a0c
#define mmDCP1_GRPH_Y_START 0x1c0c
#define mmDCP2_GRPH_Y_START 0x1e0c
#define mmDCP3_GRPH_Y_START 0x400c
#define mmDCP4_GRPH_Y_START 0x420c
#define mmDCP5_GRPH_Y_START 0x440c
#define mmGRPH_X_END 0x1a0d
#define mmDCP0_GRPH_X_END 0x1a0d
#define mmDCP1_GRPH_X_END 0x1c0d
#define mmDCP2_GRPH_X_END 0x1e0d
#define mmDCP3_GRPH_X_END 0x400d
#define mmDCP4_GRPH_X_END 0x420d
#define mmDCP5_GRPH_X_END 0x440d
#define mmGRPH_Y_END 0x1a0e
#define mmDCP0_GRPH_Y_END 0x1a0e
#define mmDCP1_GRPH_Y_END 0x1c0e
#define mmDCP2_GRPH_Y_END 0x1e0e
#define mmDCP3_GRPH_Y_END 0x400e
#define mmDCP4_GRPH_Y_END 0x420e
#define mmDCP5_GRPH_Y_END 0x440e
#define mmINPUT_GAMMA_CONTROL 0x1a10
#define mmDCP0_INPUT_GAMMA_CONTROL 0x1a10
#define mmDCP1_INPUT_GAMMA_CONTROL 0x1c10
#define mmDCP2_INPUT_GAMMA_CONTROL 0x1e10
#define mmDCP3_INPUT_GAMMA_CONTROL 0x4010
#define mmDCP4_INPUT_GAMMA_CONTROL 0x4210
#define mmDCP5_INPUT_GAMMA_CONTROL 0x4410
#define mmGRPH_UPDATE 0x1a11
#define mmDCP0_GRPH_UPDATE 0x1a11
#define mmDCP1_GRPH_UPDATE 0x1c11
#define mmDCP2_GRPH_UPDATE 0x1e11
#define mmDCP3_GRPH_UPDATE 0x4011
#define mmDCP4_GRPH_UPDATE 0x4211
#define mmDCP5_GRPH_UPDATE 0x4411
#define mmGRPH_FLIP_CONTROL 0x1a12
#define mmDCP0_GRPH_FLIP_CONTROL 0x1a12
#define mmDCP1_GRPH_FLIP_CONTROL 0x1c12
#define mmDCP2_GRPH_FLIP_CONTROL 0x1e12
#define mmDCP3_GRPH_FLIP_CONTROL 0x4012
#define mmDCP4_GRPH_FLIP_CONTROL 0x4212
#define mmDCP5_GRPH_FLIP_CONTROL 0x4412
#define mmGRPH_SURFACE_ADDRESS_INUSE 0x1a13
#define mmDCP0_GRPH_SURFACE_ADDRESS_INUSE 0x1a13
#define mmDCP1_GRPH_SURFACE_ADDRESS_INUSE 0x1c13
#define mmDCP2_GRPH_SURFACE_ADDRESS_INUSE 0x1e13
#define mmDCP3_GRPH_SURFACE_ADDRESS_INUSE 0x4013
#define mmDCP4_GRPH_SURFACE_ADDRESS_INUSE 0x4213
#define mmDCP5_GRPH_SURFACE_ADDRESS_INUSE 0x4413
#define mmGRPH_DFQ_CONTROL 0x1a14
#define mmDCP0_GRPH_DFQ_CONTROL 0x1a14
#define mmDCP1_GRPH_DFQ_CONTROL 0x1c14
#define mmDCP2_GRPH_DFQ_CONTROL 0x1e14
#define mmDCP3_GRPH_DFQ_CONTROL 0x4014
#define mmDCP4_GRPH_DFQ_CONTROL 0x4214
#define mmDCP5_GRPH_DFQ_CONTROL 0x4414
#define mmGRPH_DFQ_STATUS 0x1a15
#define mmDCP0_GRPH_DFQ_STATUS 0x1a15
#define mmDCP1_GRPH_DFQ_STATUS 0x1c15
#define mmDCP2_GRPH_DFQ_STATUS 0x1e15
#define mmDCP3_GRPH_DFQ_STATUS 0x4015
#define mmDCP4_GRPH_DFQ_STATUS 0x4215
#define mmDCP5_GRPH_DFQ_STATUS 0x4415
#define mmGRPH_INTERRUPT_STATUS 0x1a16
#define mmDCP0_GRPH_INTERRUPT_STATUS 0x1a16
#define mmDCP1_GRPH_INTERRUPT_STATUS 0x1c16
#define mmDCP2_GRPH_INTERRUPT_STATUS 0x1e16
#define mmDCP3_GRPH_INTERRUPT_STATUS 0x4016
#define mmDCP4_GRPH_INTERRUPT_STATUS 0x4216
#define mmDCP5_GRPH_INTERRUPT_STATUS 0x4416
#define mmGRPH_INTERRUPT_CONTROL 0x1a17
#define mmDCP0_GRPH_INTERRUPT_CONTROL 0x1a17
#define mmDCP1_GRPH_INTERRUPT_CONTROL 0x1c17
#define mmDCP2_GRPH_INTERRUPT_CONTROL 0x1e17
#define mmDCP3_GRPH_INTERRUPT_CONTROL 0x4017
#define mmDCP4_GRPH_INTERRUPT_CONTROL 0x4217
#define mmDCP5_GRPH_INTERRUPT_CONTROL 0x4417
#define mmGRPH_SURFACE_ADDRESS_HIGH_INUSE 0x1a18
#define mmDCP0_GRPH_SURFACE_ADDRESS_HIGH_INUSE 0x1a18
#define mmDCP1_GRPH_SURFACE_ADDRESS_HIGH_INUSE 0x1c18
#define mmDCP2_GRPH_SURFACE_ADDRESS_HIGH_INUSE 0x1e18
#define mmDCP3_GRPH_SURFACE_ADDRESS_HIGH_INUSE 0x4018
#define mmDCP4_GRPH_SURFACE_ADDRESS_HIGH_INUSE 0x4218
#define mmDCP5_GRPH_SURFACE_ADDRESS_HIGH_INUSE 0x4418
#define mmGRPH_COMPRESS_SURFACE_ADDRESS 0x1a19
#define mmDCP0_GRPH_COMPRESS_SURFACE_ADDRESS 0x1a19
#define mmDCP1_GRPH_COMPRESS_SURFACE_ADDRESS 0x1c19
#define mmDCP2_GRPH_COMPRESS_SURFACE_ADDRESS 0x1e19
#define mmDCP3_GRPH_COMPRESS_SURFACE_ADDRESS 0x4019
#define mmDCP4_GRPH_COMPRESS_SURFACE_ADDRESS 0x4219
#define mmDCP5_GRPH_COMPRESS_SURFACE_ADDRESS 0x4419
#define mmGRPH_COMPRESS_PITCH 0x1a1a
#define mmDCP0_GRPH_COMPRESS_PITCH 0x1a1a
#define mmDCP1_GRPH_COMPRESS_PITCH 0x1c1a
#define mmDCP2_GRPH_COMPRESS_PITCH 0x1e1a
#define mmDCP3_GRPH_COMPRESS_PITCH 0x401a
#define mmDCP4_GRPH_COMPRESS_PITCH 0x421a
#define mmDCP5_GRPH_COMPRESS_PITCH 0x441a
#define mmGRPH_COMPRESS_SURFACE_ADDRESS_HIGH 0x1a1b
#define mmDCP0_GRPH_COMPRESS_SURFACE_ADDRESS_HIGH 0x1a1b
#define mmDCP1_GRPH_COMPRESS_SURFACE_ADDRESS_HIGH 0x1c1b
#define mmDCP2_GRPH_COMPRESS_SURFACE_ADDRESS_HIGH 0x1e1b
#define mmDCP3_GRPH_COMPRESS_SURFACE_ADDRESS_HIGH 0x401b
#define mmDCP4_GRPH_COMPRESS_SURFACE_ADDRESS_HIGH 0x421b
#define mmDCP5_GRPH_COMPRESS_SURFACE_ADDRESS_HIGH 0x441b
#define mmGRPH_PIPE_OUTSTANDING_REQUEST_LIMIT 0x1a1c
#define mmDCP0_GRPH_PIPE_OUTSTANDING_REQUEST_LIMIT 0x1a1c
#define mmDCP1_GRPH_PIPE_OUTSTANDING_REQUEST_LIMIT 0x1c1c
#define mmDCP2_GRPH_PIPE_OUTSTANDING_REQUEST_LIMIT 0x1e1c
#define mmDCP3_GRPH_PIPE_OUTSTANDING_REQUEST_LIMIT 0x401c
#define mmDCP4_GRPH_PIPE_OUTSTANDING_REQUEST_LIMIT 0x421c
#define mmDCP5_GRPH_PIPE_OUTSTANDING_REQUEST_LIMIT 0x441c
#define mmPRESCALE_GRPH_CONTROL 0x1a2d
#define mmDCP0_PRESCALE_GRPH_CONTROL 0x1a2d
#define mmDCP1_PRESCALE_GRPH_CONTROL 0x1c2d
#define mmDCP2_PRESCALE_GRPH_CONTROL 0x1e2d
#define mmDCP3_PRESCALE_GRPH_CONTROL 0x402d
#define mmDCP4_PRESCALE_GRPH_CONTROL 0x422d
#define mmDCP5_PRESCALE_GRPH_CONTROL 0x442d
#define mmPRESCALE_VALUES_GRPH_R 0x1a2e
#define mmDCP0_PRESCALE_VALUES_GRPH_R 0x1a2e
#define mmDCP1_PRESCALE_VALUES_GRPH_R 0x1c2e
#define mmDCP2_PRESCALE_VALUES_GRPH_R 0x1e2e
#define mmDCP3_PRESCALE_VALUES_GRPH_R 0x402e
#define mmDCP4_PRESCALE_VALUES_GRPH_R 0x422e
#define mmDCP5_PRESCALE_VALUES_GRPH_R 0x442e
#define mmPRESCALE_VALUES_GRPH_G 0x1a2f
#define mmDCP0_PRESCALE_VALUES_GRPH_G 0x1a2f
#define mmDCP1_PRESCALE_VALUES_GRPH_G 0x1c2f
#define mmDCP2_PRESCALE_VALUES_GRPH_G 0x1e2f
#define mmDCP3_PRESCALE_VALUES_GRPH_G 0x402f
#define mmDCP4_PRESCALE_VALUES_GRPH_G 0x422f
#define mmDCP5_PRESCALE_VALUES_GRPH_G 0x442f
#define mmPRESCALE_VALUES_GRPH_B 0x1a30
#define mmDCP0_PRESCALE_VALUES_GRPH_B 0x1a30
#define mmDCP1_PRESCALE_VALUES_GRPH_B 0x1c30
#define mmDCP2_PRESCALE_VALUES_GRPH_B 0x1e30
#define mmDCP3_PRESCALE_VALUES_GRPH_B 0x4030
#define mmDCP4_PRESCALE_VALUES_GRPH_B 0x4230
#define mmDCP5_PRESCALE_VALUES_GRPH_B 0x4430
#define mmINPUT_CSC_CONTROL 0x1a35
#define mmDCP0_INPUT_CSC_CONTROL 0x1a35
#define mmDCP1_INPUT_CSC_CONTROL 0x1c35
#define mmDCP2_INPUT_CSC_CONTROL 0x1e35
#define mmDCP3_INPUT_CSC_CONTROL 0x4035
#define mmDCP4_INPUT_CSC_CONTROL 0x4235
#define mmDCP5_INPUT_CSC_CONTROL 0x4435
#define mmINPUT_CSC_C11_C12 0x1a36
#define mmDCP0_INPUT_CSC_C11_C12 0x1a36
#define mmDCP1_INPUT_CSC_C11_C12 0x1c36
#define mmDCP2_INPUT_CSC_C11_C12 0x1e36
#define mmDCP3_INPUT_CSC_C11_C12 0x4036
#define mmDCP4_INPUT_CSC_C11_C12 0x4236
#define mmDCP5_INPUT_CSC_C11_C12 0x4436
#define mmINPUT_CSC_C13_C14 0x1a37
#define mmDCP0_INPUT_CSC_C13_C14 0x1a37
#define mmDCP1_INPUT_CSC_C13_C14 0x1c37
#define mmDCP2_INPUT_CSC_C13_C14 0x1e37
#define mmDCP3_INPUT_CSC_C13_C14 0x4037
#define mmDCP4_INPUT_CSC_C13_C14 0x4237
#define mmDCP5_INPUT_CSC_C13_C14 0x4437
#define mmINPUT_CSC_C21_C22 0x1a38
#define mmDCP0_INPUT_CSC_C21_C22 0x1a38
#define mmDCP1_INPUT_CSC_C21_C22 0x1c38
#define mmDCP2_INPUT_CSC_C21_C22 0x1e38
#define mmDCP3_INPUT_CSC_C21_C22 0x4038
#define mmDCP4_INPUT_CSC_C21_C22 0x4238
#define mmDCP5_INPUT_CSC_C21_C22 0x4438
#define mmINPUT_CSC_C23_C24 0x1a39
#define mmDCP0_INPUT_CSC_C23_C24 0x1a39
#define mmDCP1_INPUT_CSC_C23_C24 0x1c39
#define mmDCP2_INPUT_CSC_C23_C24 0x1e39
#define mmDCP3_INPUT_CSC_C23_C24 0x4039
#define mmDCP4_INPUT_CSC_C23_C24 0x4239
#define mmDCP5_INPUT_CSC_C23_C24 0x4439
#define mmINPUT_CSC_C31_C32 0x1a3a
#define mmDCP0_INPUT_CSC_C31_C32 0x1a3a
#define mmDCP1_INPUT_CSC_C31_C32 0x1c3a
#define mmDCP2_INPUT_CSC_C31_C32 0x1e3a
#define mmDCP3_INPUT_CSC_C31_C32 0x403a
#define mmDCP4_INPUT_CSC_C31_C32 0x423a
#define mmDCP5_INPUT_CSC_C31_C32 0x443a
#define mmINPUT_CSC_C33_C34 0x1a3b
#define mmDCP0_INPUT_CSC_C33_C34 0x1a3b
#define mmDCP1_INPUT_CSC_C33_C34 0x1c3b
#define mmDCP2_INPUT_CSC_C33_C34 0x1e3b
#define mmDCP3_INPUT_CSC_C33_C34 0x403b
#define mmDCP4_INPUT_CSC_C33_C34 0x423b
#define mmDCP5_INPUT_CSC_C33_C34 0x443b
#define mmOUTPUT_CSC_CONTROL 0x1a3c
#define mmDCP0_OUTPUT_CSC_CONTROL 0x1a3c
#define mmDCP1_OUTPUT_CSC_CONTROL 0x1c3c
#define mmDCP2_OUTPUT_CSC_CONTROL 0x1e3c
#define mmDCP3_OUTPUT_CSC_CONTROL 0x403c
#define mmDCP4_OUTPUT_CSC_CONTROL 0x423c
#define mmDCP5_OUTPUT_CSC_CONTROL 0x443c
#define mmOUTPUT_CSC_C11_C12 0x1a3d
#define mmDCP0_OUTPUT_CSC_C11_C12 0x1a3d
#define mmDCP1_OUTPUT_CSC_C11_C12 0x1c3d
#define mmDCP2_OUTPUT_CSC_C11_C12 0x1e3d
#define mmDCP3_OUTPUT_CSC_C11_C12 0x403d
#define mmDCP4_OUTPUT_CSC_C11_C12 0x423d
#define mmDCP5_OUTPUT_CSC_C11_C12 0x443d
#define mmOUTPUT_CSC_C13_C14 0x1a3e
#define mmDCP0_OUTPUT_CSC_C13_C14 0x1a3e
#define mmDCP1_OUTPUT_CSC_C13_C14 0x1c3e
#define mmDCP2_OUTPUT_CSC_C13_C14 0x1e3e
#define mmDCP3_OUTPUT_CSC_C13_C14 0x403e
#define mmDCP4_OUTPUT_CSC_C13_C14 0x423e
#define mmDCP5_OUTPUT_CSC_C13_C14 0x443e
#define mmOUTPUT_CSC_C21_C22 0x1a3f
#define mmDCP0_OUTPUT_CSC_C21_C22 0x1a3f
#define mmDCP1_OUTPUT_CSC_C21_C22 0x1c3f
#define mmDCP2_OUTPUT_CSC_C21_C22 0x1e3f
#define mmDCP3_OUTPUT_CSC_C21_C22 0x403f
#define mmDCP4_OUTPUT_CSC_C21_C22 0x423f
#define mmDCP5_OUTPUT_CSC_C21_C22 0x443f
#define mmOUTPUT_CSC_C23_C24 0x1a40
#define mmDCP0_OUTPUT_CSC_C23_C24 0x1a40
#define mmDCP1_OUTPUT_CSC_C23_C24 0x1c40
#define mmDCP2_OUTPUT_CSC_C23_C24 0x1e40
#define mmDCP3_OUTPUT_CSC_C23_C24 0x4040
#define mmDCP4_OUTPUT_CSC_C23_C24 0x4240
#define mmDCP5_OUTPUT_CSC_C23_C24 0x4440
#define mmOUTPUT_CSC_C31_C32 0x1a41
#define mmDCP0_OUTPUT_CSC_C31_C32 0x1a41
#define mmDCP1_OUTPUT_CSC_C31_C32 0x1c41
#define mmDCP2_OUTPUT_CSC_C31_C32 0x1e41
#define mmDCP3_OUTPUT_CSC_C31_C32 0x4041
#define mmDCP4_OUTPUT_CSC_C31_C32 0x4241
#define mmDCP5_OUTPUT_CSC_C31_C32 0x4441
#define mmOUTPUT_CSC_C33_C34 0x1a42
#define mmDCP0_OUTPUT_CSC_C33_C34 0x1a42
#define mmDCP1_OUTPUT_CSC_C33_C34 0x1c42
#define mmDCP2_OUTPUT_CSC_C33_C34 0x1e42
#define mmDCP3_OUTPUT_CSC_C33_C34 0x4042
#define mmDCP4_OUTPUT_CSC_C33_C34 0x4242
#define mmDCP5_OUTPUT_CSC_C33_C34 0x4442
#define mmCOMM_MATRIXA_TRANS_C11_C12 0x1a43
#define mmDCP0_COMM_MATRIXA_TRANS_C11_C12 0x1a43
#define mmDCP1_COMM_MATRIXA_TRANS_C11_C12 0x1c43
#define mmDCP2_COMM_MATRIXA_TRANS_C11_C12 0x1e43
#define mmDCP3_COMM_MATRIXA_TRANS_C11_C12 0x4043
#define mmDCP4_COMM_MATRIXA_TRANS_C11_C12 0x4243
#define mmDCP5_COMM_MATRIXA_TRANS_C11_C12 0x4443
#define mmCOMM_MATRIXA_TRANS_C13_C14 0x1a44
#define mmDCP0_COMM_MATRIXA_TRANS_C13_C14 0x1a44
#define mmDCP1_COMM_MATRIXA_TRANS_C13_C14 0x1c44
#define mmDCP2_COMM_MATRIXA_TRANS_C13_C14 0x1e44
#define mmDCP3_COMM_MATRIXA_TRANS_C13_C14 0x4044
#define mmDCP4_COMM_MATRIXA_TRANS_C13_C14 0x4244
#define mmDCP5_COMM_MATRIXA_TRANS_C13_C14 0x4444
#define mmCOMM_MATRIXA_TRANS_C21_C22 0x1a45
#define mmDCP0_COMM_MATRIXA_TRANS_C21_C22 0x1a45
#define mmDCP1_COMM_MATRIXA_TRANS_C21_C22 0x1c45
#define mmDCP2_COMM_MATRIXA_TRANS_C21_C22 0x1e45
#define mmDCP3_COMM_MATRIXA_TRANS_C21_C22 0x4045
#define mmDCP4_COMM_MATRIXA_TRANS_C21_C22 0x4245
#define mmDCP5_COMM_MATRIXA_TRANS_C21_C22 0x4445
#define mmCOMM_MATRIXA_TRANS_C23_C24 0x1a46
#define mmDCP0_COMM_MATRIXA_TRANS_C23_C24 0x1a46
#define mmDCP1_COMM_MATRIXA_TRANS_C23_C24 0x1c46
#define mmDCP2_COMM_MATRIXA_TRANS_C23_C24 0x1e46
#define mmDCP3_COMM_MATRIXA_TRANS_C23_C24 0x4046
#define mmDCP4_COMM_MATRIXA_TRANS_C23_C24 0x4246
#define mmDCP5_COMM_MATRIXA_TRANS_C23_C24 0x4446
#define mmCOMM_MATRIXA_TRANS_C31_C32 0x1a47
#define mmDCP0_COMM_MATRIXA_TRANS_C31_C32 0x1a47
#define mmDCP1_COMM_MATRIXA_TRANS_C31_C32 0x1c47
#define mmDCP2_COMM_MATRIXA_TRANS_C31_C32 0x1e47
#define mmDCP3_COMM_MATRIXA_TRANS_C31_C32 0x4047
#define mmDCP4_COMM_MATRIXA_TRANS_C31_C32 0x4247
#define mmDCP5_COMM_MATRIXA_TRANS_C31_C32 0x4447
#define mmCOMM_MATRIXA_TRANS_C33_C34 0x1a48
#define mmDCP0_COMM_MATRIXA_TRANS_C33_C34 0x1a48
#define mmDCP1_COMM_MATRIXA_TRANS_C33_C34 0x1c48
#define mmDCP2_COMM_MATRIXA_TRANS_C33_C34 0x1e48
#define mmDCP3_COMM_MATRIXA_TRANS_C33_C34 0x4048
#define mmDCP4_COMM_MATRIXA_TRANS_C33_C34 0x4248
#define mmDCP5_COMM_MATRIXA_TRANS_C33_C34 0x4448
#define mmCOMM_MATRIXB_TRANS_C11_C12 0x1a49
#define mmDCP0_COMM_MATRIXB_TRANS_C11_C12 0x1a49
#define mmDCP1_COMM_MATRIXB_TRANS_C11_C12 0x1c49
#define mmDCP2_COMM_MATRIXB_TRANS_C11_C12 0x1e49
#define mmDCP3_COMM_MATRIXB_TRANS_C11_C12 0x4049
#define mmDCP4_COMM_MATRIXB_TRANS_C11_C12 0x4249
#define mmDCP5_COMM_MATRIXB_TRANS_C11_C12 0x4449
#define mmCOMM_MATRIXB_TRANS_C13_C14 0x1a4a
#define mmDCP0_COMM_MATRIXB_TRANS_C13_C14 0x1a4a
#define mmDCP1_COMM_MATRIXB_TRANS_C13_C14 0x1c4a
#define mmDCP2_COMM_MATRIXB_TRANS_C13_C14 0x1e4a
#define mmDCP3_COMM_MATRIXB_TRANS_C13_C14 0x404a
#define mmDCP4_COMM_MATRIXB_TRANS_C13_C14 0x424a
#define mmDCP5_COMM_MATRIXB_TRANS_C13_C14 0x444a
#define mmCOMM_MATRIXB_TRANS_C21_C22 0x1a4b
#define mmDCP0_COMM_MATRIXB_TRANS_C21_C22 0x1a4b
#define mmDCP1_COMM_MATRIXB_TRANS_C21_C22 0x1c4b
#define mmDCP2_COMM_MATRIXB_TRANS_C21_C22 0x1e4b
#define mmDCP3_COMM_MATRIXB_TRANS_C21_C22 0x404b
#define mmDCP4_COMM_MATRIXB_TRANS_C21_C22 0x424b
#define mmDCP5_COMM_MATRIXB_TRANS_C21_C22 0x444b
#define mmCOMM_MATRIXB_TRANS_C23_C24 0x1a4c
#define mmDCP0_COMM_MATRIXB_TRANS_C23_C24 0x1a4c
#define mmDCP1_COMM_MATRIXB_TRANS_C23_C24 0x1c4c
#define mmDCP2_COMM_MATRIXB_TRANS_C23_C24 0x1e4c
#define mmDCP3_COMM_MATRIXB_TRANS_C23_C24 0x404c
#define mmDCP4_COMM_MATRIXB_TRANS_C23_C24 0x424c
#define mmDCP5_COMM_MATRIXB_TRANS_C23_C24 0x444c
#define mmCOMM_MATRIXB_TRANS_C31_C32 0x1a4d
#define mmDCP0_COMM_MATRIXB_TRANS_C31_C32 0x1a4d
#define mmDCP1_COMM_MATRIXB_TRANS_C31_C32 0x1c4d
#define mmDCP2_COMM_MATRIXB_TRANS_C31_C32 0x1e4d
#define mmDCP3_COMM_MATRIXB_TRANS_C31_C32 0x404d
#define mmDCP4_COMM_MATRIXB_TRANS_C31_C32 0x424d
#define mmDCP5_COMM_MATRIXB_TRANS_C31_C32 0x444d
#define mmCOMM_MATRIXB_TRANS_C33_C34 0x1a4e
#define mmDCP0_COMM_MATRIXB_TRANS_C33_C34 0x1a4e
#define mmDCP1_COMM_MATRIXB_TRANS_C33_C34 0x1c4e
#define mmDCP2_COMM_MATRIXB_TRANS_C33_C34 0x1e4e
#define mmDCP3_COMM_MATRIXB_TRANS_C33_C34 0x404e
#define mmDCP4_COMM_MATRIXB_TRANS_C33_C34 0x424e
#define mmDCP5_COMM_MATRIXB_TRANS_C33_C34 0x444e
#define mmDENORM_CONTROL 0x1a50
#define mmDCP0_DENORM_CONTROL 0x1a50
#define mmDCP1_DENORM_CONTROL 0x1c50
#define mmDCP2_DENORM_CONTROL 0x1e50
#define mmDCP3_DENORM_CONTROL 0x4050
#define mmDCP4_DENORM_CONTROL 0x4250
#define mmDCP5_DENORM_CONTROL 0x4450
#define mmOUT_ROUND_CONTROL 0x1a51
#define mmDCP0_OUT_ROUND_CONTROL 0x1a51
#define mmDCP1_OUT_ROUND_CONTROL 0x1c51
#define mmDCP2_OUT_ROUND_CONTROL 0x1e51
#define mmDCP3_OUT_ROUND_CONTROL 0x4051
#define mmDCP4_OUT_ROUND_CONTROL 0x4251
#define mmDCP5_OUT_ROUND_CONTROL 0x4451
#define mmOUT_CLAMP_CONTROL_R_CR 0x1a52
#define mmDCP0_OUT_CLAMP_CONTROL_R_CR 0x1a52
#define mmDCP1_OUT_CLAMP_CONTROL_R_CR 0x1c52
#define mmDCP2_OUT_CLAMP_CONTROL_R_CR 0x1e52
#define mmDCP3_OUT_CLAMP_CONTROL_R_CR 0x4052
#define mmDCP4_OUT_CLAMP_CONTROL_R_CR 0x4252
#define mmDCP5_OUT_CLAMP_CONTROL_R_CR 0x4452
#define mmOUT_CLAMP_CONTROL_G_Y 0x1a9c
#define mmDCP0_OUT_CLAMP_CONTROL_G_Y 0x1a9c
#define mmDCP1_OUT_CLAMP_CONTROL_G_Y 0x1c9c
#define mmDCP2_OUT_CLAMP_CONTROL_G_Y 0x1e9c
#define mmDCP3_OUT_CLAMP_CONTROL_G_Y 0x409c
#define mmDCP4_OUT_CLAMP_CONTROL_G_Y 0x429c
#define mmDCP5_OUT_CLAMP_CONTROL_G_Y 0x449c
#define mmOUT_CLAMP_CONTROL_B_CB 0x1a9d
#define mmDCP0_OUT_CLAMP_CONTROL_B_CB 0x1a9d
#define mmDCP1_OUT_CLAMP_CONTROL_B_CB 0x1c9d
#define mmDCP2_OUT_CLAMP_CONTROL_B_CB 0x1e9d
#define mmDCP3_OUT_CLAMP_CONTROL_B_CB 0x409d
#define mmDCP4_OUT_CLAMP_CONTROL_B_CB 0x429d
#define mmDCP5_OUT_CLAMP_CONTROL_B_CB 0x449d
#define mmKEY_CONTROL 0x1a53
#define mmDCP0_KEY_CONTROL 0x1a53
#define mmDCP1_KEY_CONTROL 0x1c53
#define mmDCP2_KEY_CONTROL 0x1e53
#define mmDCP3_KEY_CONTROL 0x4053
#define mmDCP4_KEY_CONTROL 0x4253
#define mmDCP5_KEY_CONTROL 0x4453
#define mmKEY_RANGE_ALPHA 0x1a54
#define mmDCP0_KEY_RANGE_ALPHA 0x1a54
#define mmDCP1_KEY_RANGE_ALPHA 0x1c54
#define mmDCP2_KEY_RANGE_ALPHA 0x1e54
#define mmDCP3_KEY_RANGE_ALPHA 0x4054
#define mmDCP4_KEY_RANGE_ALPHA 0x4254
#define mmDCP5_KEY_RANGE_ALPHA 0x4454
#define mmKEY_RANGE_RED 0x1a55
#define mmDCP0_KEY_RANGE_RED 0x1a55
#define mmDCP1_KEY_RANGE_RED 0x1c55
#define mmDCP2_KEY_RANGE_RED 0x1e55
#define mmDCP3_KEY_RANGE_RED 0x4055
#define mmDCP4_KEY_RANGE_RED 0x4255
#define mmDCP5_KEY_RANGE_RED 0x4455
#define mmKEY_RANGE_GREEN 0x1a56
#define mmDCP0_KEY_RANGE_GREEN 0x1a56
#define mmDCP1_KEY_RANGE_GREEN 0x1c56
#define mmDCP2_KEY_RANGE_GREEN 0x1e56
#define mmDCP3_KEY_RANGE_GREEN 0x4056
#define mmDCP4_KEY_RANGE_GREEN 0x4256
#define mmDCP5_KEY_RANGE_GREEN 0x4456
#define mmKEY_RANGE_BLUE 0x1a57
#define mmDCP0_KEY_RANGE_BLUE 0x1a57
#define mmDCP1_KEY_RANGE_BLUE 0x1c57
#define mmDCP2_KEY_RANGE_BLUE 0x1e57
#define mmDCP3_KEY_RANGE_BLUE 0x4057
#define mmDCP4_KEY_RANGE_BLUE 0x4257
#define mmDCP5_KEY_RANGE_BLUE 0x4457
#define mmDEGAMMA_CONTROL 0x1a58
#define mmDCP0_DEGAMMA_CONTROL 0x1a58
#define mmDCP1_DEGAMMA_CONTROL 0x1c58
#define mmDCP2_DEGAMMA_CONTROL 0x1e58
#define mmDCP3_DEGAMMA_CONTROL 0x4058
#define mmDCP4_DEGAMMA_CONTROL 0x4258
#define mmDCP5_DEGAMMA_CONTROL 0x4458
#define mmGAMUT_REMAP_CONTROL 0x1a59
#define mmDCP0_GAMUT_REMAP_CONTROL 0x1a59
#define mmDCP1_GAMUT_REMAP_CONTROL 0x1c59
#define mmDCP2_GAMUT_REMAP_CONTROL 0x1e59
#define mmDCP3_GAMUT_REMAP_CONTROL 0x4059
#define mmDCP4_GAMUT_REMAP_CONTROL 0x4259
#define mmDCP5_GAMUT_REMAP_CONTROL 0x4459
#define mmGAMUT_REMAP_C11_C12 0x1a5a
#define mmDCP0_GAMUT_REMAP_C11_C12 0x1a5a
#define mmDCP1_GAMUT_REMAP_C11_C12 0x1c5a
#define mmDCP2_GAMUT_REMAP_C11_C12 0x1e5a
#define mmDCP3_GAMUT_REMAP_C11_C12 0x405a
#define mmDCP4_GAMUT_REMAP_C11_C12 0x425a
#define mmDCP5_GAMUT_REMAP_C11_C12 0x445a
#define mmGAMUT_REMAP_C13_C14 0x1a5b
#define mmDCP0_GAMUT_REMAP_C13_C14 0x1a5b
#define mmDCP1_GAMUT_REMAP_C13_C14 0x1c5b
#define mmDCP2_GAMUT_REMAP_C13_C14 0x1e5b
#define mmDCP3_GAMUT_REMAP_C13_C14 0x405b
#define mmDCP4_GAMUT_REMAP_C13_C14 0x425b
#define mmDCP5_GAMUT_REMAP_C13_C14 0x445b
#define mmGAMUT_REMAP_C21_C22 0x1a5c
#define mmDCP0_GAMUT_REMAP_C21_C22 0x1a5c
#define mmDCP1_GAMUT_REMAP_C21_C22 0x1c5c
#define mmDCP2_GAMUT_REMAP_C21_C22 0x1e5c
#define mmDCP3_GAMUT_REMAP_C21_C22 0x405c
#define mmDCP4_GAMUT_REMAP_C21_C22 0x425c
#define mmDCP5_GAMUT_REMAP_C21_C22 0x445c
#define mmGAMUT_REMAP_C23_C24 0x1a5d
#define mmDCP0_GAMUT_REMAP_C23_C24 0x1a5d
#define mmDCP1_GAMUT_REMAP_C23_C24 0x1c5d
#define mmDCP2_GAMUT_REMAP_C23_C24 0x1e5d
#define mmDCP3_GAMUT_REMAP_C23_C24 0x405d
#define mmDCP4_GAMUT_REMAP_C23_C24 0x425d
#define mmDCP5_GAMUT_REMAP_C23_C24 0x445d
#define mmGAMUT_REMAP_C31_C32 0x1a5e
#define mmDCP0_GAMUT_REMAP_C31_C32 0x1a5e
#define mmDCP1_GAMUT_REMAP_C31_C32 0x1c5e
#define mmDCP2_GAMUT_REMAP_C31_C32 0x1e5e
#define mmDCP3_GAMUT_REMAP_C31_C32 0x405e
#define mmDCP4_GAMUT_REMAP_C31_C32 0x425e
#define mmDCP5_GAMUT_REMAP_C31_C32 0x445e
#define mmGAMUT_REMAP_C33_C34 0x1a5f
#define mmDCP0_GAMUT_REMAP_C33_C34 0x1a5f
#define mmDCP1_GAMUT_REMAP_C33_C34 0x1c5f
#define mmDCP2_GAMUT_REMAP_C33_C34 0x1e5f
#define mmDCP3_GAMUT_REMAP_C33_C34 0x405f
#define mmDCP4_GAMUT_REMAP_C33_C34 0x425f
#define mmDCP5_GAMUT_REMAP_C33_C34 0x445f
#define mmDCP_SPATIAL_DITHER_CNTL 0x1a60
#define mmDCP0_DCP_SPATIAL_DITHER_CNTL 0x1a60
#define mmDCP1_DCP_SPATIAL_DITHER_CNTL 0x1c60
#define mmDCP2_DCP_SPATIAL_DITHER_CNTL 0x1e60
#define mmDCP3_DCP_SPATIAL_DITHER_CNTL 0x4060
#define mmDCP4_DCP_SPATIAL_DITHER_CNTL 0x4260
#define mmDCP5_DCP_SPATIAL_DITHER_CNTL 0x4460
#define mmDCP_FP_CONVERTED_FIELD 0x1a65
#define mmDCP0_DCP_FP_CONVERTED_FIELD 0x1a65
#define mmDCP1_DCP_FP_CONVERTED_FIELD 0x1c65
#define mmDCP2_DCP_FP_CONVERTED_FIELD 0x1e65
#define mmDCP3_DCP_FP_CONVERTED_FIELD 0x4065
#define mmDCP4_DCP_FP_CONVERTED_FIELD 0x4265
#define mmDCP5_DCP_FP_CONVERTED_FIELD 0x4465
#define mmCUR_CONTROL 0x1a66
#define mmDCP0_CUR_CONTROL 0x1a66
#define mmDCP1_CUR_CONTROL 0x1c66
#define mmDCP2_CUR_CONTROL 0x1e66
#define mmDCP3_CUR_CONTROL 0x4066
#define mmDCP4_CUR_CONTROL 0x4266
#define mmDCP5_CUR_CONTROL 0x4466
#define mmCUR_SURFACE_ADDRESS 0x1a67
#define mmDCP0_CUR_SURFACE_ADDRESS 0x1a67
#define mmDCP1_CUR_SURFACE_ADDRESS 0x1c67
#define mmDCP2_CUR_SURFACE_ADDRESS 0x1e67
#define mmDCP3_CUR_SURFACE_ADDRESS 0x4067
#define mmDCP4_CUR_SURFACE_ADDRESS 0x4267
#define mmDCP5_CUR_SURFACE_ADDRESS 0x4467
#define mmCUR_SIZE 0x1a68
#define mmDCP0_CUR_SIZE 0x1a68
#define mmDCP1_CUR_SIZE 0x1c68
#define mmDCP2_CUR_SIZE 0x1e68
#define mmDCP3_CUR_SIZE 0x4068
#define mmDCP4_CUR_SIZE 0x4268
#define mmDCP5_CUR_SIZE 0x4468
#define mmCUR_SURFACE_ADDRESS_HIGH 0x1a69
#define mmDCP0_CUR_SURFACE_ADDRESS_HIGH 0x1a69
#define mmDCP1_CUR_SURFACE_ADDRESS_HIGH 0x1c69
#define mmDCP2_CUR_SURFACE_ADDRESS_HIGH 0x1e69
#define mmDCP3_CUR_SURFACE_ADDRESS_HIGH 0x4069
#define mmDCP4_CUR_SURFACE_ADDRESS_HIGH 0x4269
#define mmDCP5_CUR_SURFACE_ADDRESS_HIGH 0x4469
#define mmCUR_POSITION 0x1a6a
#define mmDCP0_CUR_POSITION 0x1a6a
#define mmDCP1_CUR_POSITION 0x1c6a
#define mmDCP2_CUR_POSITION 0x1e6a
#define mmDCP3_CUR_POSITION 0x406a
#define mmDCP4_CUR_POSITION 0x426a
#define mmDCP5_CUR_POSITION 0x446a
#define mmCUR_HOT_SPOT 0x1a6b
#define mmDCP0_CUR_HOT_SPOT 0x1a6b
#define mmDCP1_CUR_HOT_SPOT 0x1c6b
#define mmDCP2_CUR_HOT_SPOT 0x1e6b
#define mmDCP3_CUR_HOT_SPOT 0x406b
#define mmDCP4_CUR_HOT_SPOT 0x426b
#define mmDCP5_CUR_HOT_SPOT 0x446b
#define mmCUR_COLOR1 0x1a6c
#define mmDCP0_CUR_COLOR1 0x1a6c
#define mmDCP1_CUR_COLOR1 0x1c6c
#define mmDCP2_CUR_COLOR1 0x1e6c
#define mmDCP3_CUR_COLOR1 0x406c
#define mmDCP4_CUR_COLOR1 0x426c
#define mmDCP5_CUR_COLOR1 0x446c
#define mmCUR_COLOR2 0x1a6d
#define mmDCP0_CUR_COLOR2 0x1a6d
#define mmDCP1_CUR_COLOR2 0x1c6d
#define mmDCP2_CUR_COLOR2 0x1e6d
#define mmDCP3_CUR_COLOR2 0x406d
#define mmDCP4_CUR_COLOR2 0x426d
#define mmDCP5_CUR_COLOR2 0x446d
#define mmCUR_UPDATE 0x1a6e
#define mmDCP0_CUR_UPDATE 0x1a6e
#define mmDCP1_CUR_UPDATE 0x1c6e
#define mmDCP2_CUR_UPDATE 0x1e6e
#define mmDCP3_CUR_UPDATE 0x406e
#define mmDCP4_CUR_UPDATE 0x426e
#define mmDCP5_CUR_UPDATE 0x446e
#define mmCUR_REQUEST_FILTER_CNTL 0x1a99
#define mmDCP0_CUR_REQUEST_FILTER_CNTL 0x1a99
#define mmDCP1_CUR_REQUEST_FILTER_CNTL 0x1c99
#define mmDCP2_CUR_REQUEST_FILTER_CNTL 0x1e99
#define mmDCP3_CUR_REQUEST_FILTER_CNTL 0x4099
#define mmDCP4_CUR_REQUEST_FILTER_CNTL 0x4299
#define mmDCP5_CUR_REQUEST_FILTER_CNTL 0x4499
#define mmCUR_STEREO_CONTROL 0x1a9a
#define mmDCP0_CUR_STEREO_CONTROL 0x1a9a
#define mmDCP1_CUR_STEREO_CONTROL 0x1c9a
#define mmDCP2_CUR_STEREO_CONTROL 0x1e9a
#define mmDCP3_CUR_STEREO_CONTROL 0x409a
#define mmDCP4_CUR_STEREO_CONTROL 0x429a
#define mmDCP5_CUR_STEREO_CONTROL 0x449a
#define mmDC_LUT_RW_MODE 0x1a78
#define mmDCP0_DC_LUT_RW_MODE 0x1a78
#define mmDCP1_DC_LUT_RW_MODE 0x1c78
#define mmDCP2_DC_LUT_RW_MODE 0x1e78
#define mmDCP3_DC_LUT_RW_MODE 0x4078
#define mmDCP4_DC_LUT_RW_MODE 0x4278
#define mmDCP5_DC_LUT_RW_MODE 0x4478
#define mmDC_LUT_RW_INDEX 0x1a79
#define mmDCP0_DC_LUT_RW_INDEX 0x1a79
#define mmDCP1_DC_LUT_RW_INDEX 0x1c79
#define mmDCP2_DC_LUT_RW_INDEX 0x1e79
#define mmDCP3_DC_LUT_RW_INDEX 0x4079
#define mmDCP4_DC_LUT_RW_INDEX 0x4279
#define mmDCP5_DC_LUT_RW_INDEX 0x4479
#define mmDC_LUT_SEQ_COLOR 0x1a7a
#define mmDCP0_DC_LUT_SEQ_COLOR 0x1a7a
#define mmDCP1_DC_LUT_SEQ_COLOR 0x1c7a
#define mmDCP2_DC_LUT_SEQ_COLOR 0x1e7a
#define mmDCP3_DC_LUT_SEQ_COLOR 0x407a
#define mmDCP4_DC_LUT_SEQ_COLOR 0x427a
#define mmDCP5_DC_LUT_SEQ_COLOR 0x447a
#define mmDC_LUT_PWL_DATA 0x1a7b
#define mmDCP0_DC_LUT_PWL_DATA 0x1a7b
#define mmDCP1_DC_LUT_PWL_DATA 0x1c7b
#define mmDCP2_DC_LUT_PWL_DATA 0x1e7b
#define mmDCP3_DC_LUT_PWL_DATA 0x407b
#define mmDCP4_DC_LUT_PWL_DATA 0x427b
#define mmDCP5_DC_LUT_PWL_DATA 0x447b
#define mmDC_LUT_30_COLOR 0x1a7c
#define mmDCP0_DC_LUT_30_COLOR 0x1a7c
#define mmDCP1_DC_LUT_30_COLOR 0x1c7c
#define mmDCP2_DC_LUT_30_COLOR 0x1e7c
#define mmDCP3_DC_LUT_30_COLOR 0x407c
#define mmDCP4_DC_LUT_30_COLOR 0x427c
#define mmDCP5_DC_LUT_30_COLOR 0x447c
#define mmDC_LUT_VGA_ACCESS_ENABLE 0x1a7d
#define mmDCP0_DC_LUT_VGA_ACCESS_ENABLE 0x1a7d
#define mmDCP1_DC_LUT_VGA_ACCESS_ENABLE 0x1c7d
#define mmDCP2_DC_LUT_VGA_ACCESS_ENABLE 0x1e7d
#define mmDCP3_DC_LUT_VGA_ACCESS_ENABLE 0x407d
#define mmDCP4_DC_LUT_VGA_ACCESS_ENABLE 0x427d
#define mmDCP5_DC_LUT_VGA_ACCESS_ENABLE 0x447d
#define mmDC_LUT_WRITE_EN_MASK 0x1a7e
#define mmDCP0_DC_LUT_WRITE_EN_MASK 0x1a7e
#define mmDCP1_DC_LUT_WRITE_EN_MASK 0x1c7e
#define mmDCP2_DC_LUT_WRITE_EN_MASK 0x1e7e
#define mmDCP3_DC_LUT_WRITE_EN_MASK 0x407e
#define mmDCP4_DC_LUT_WRITE_EN_MASK 0x427e
#define mmDCP5_DC_LUT_WRITE_EN_MASK 0x447e
#define mmDC_LUT_AUTOFILL 0x1a7f
#define mmDCP0_DC_LUT_AUTOFILL 0x1a7f
#define mmDCP1_DC_LUT_AUTOFILL 0x1c7f
#define mmDCP2_DC_LUT_AUTOFILL 0x1e7f
#define mmDCP3_DC_LUT_AUTOFILL 0x407f
#define mmDCP4_DC_LUT_AUTOFILL 0x427f
#define mmDCP5_DC_LUT_AUTOFILL 0x447f
#define mmDC_LUT_CONTROL 0x1a80
#define mmDCP0_DC_LUT_CONTROL 0x1a80
#define mmDCP1_DC_LUT_CONTROL 0x1c80
#define mmDCP2_DC_LUT_CONTROL 0x1e80
#define mmDCP3_DC_LUT_CONTROL 0x4080
#define mmDCP4_DC_LUT_CONTROL 0x4280
#define mmDCP5_DC_LUT_CONTROL 0x4480
#define mmDC_LUT_BLACK_OFFSET_BLUE 0x1a81
#define mmDCP0_DC_LUT_BLACK_OFFSET_BLUE 0x1a81
#define mmDCP1_DC_LUT_BLACK_OFFSET_BLUE 0x1c81
#define mmDCP2_DC_LUT_BLACK_OFFSET_BLUE 0x1e81
#define mmDCP3_DC_LUT_BLACK_OFFSET_BLUE 0x4081
#define mmDCP4_DC_LUT_BLACK_OFFSET_BLUE 0x4281
#define mmDCP5_DC_LUT_BLACK_OFFSET_BLUE 0x4481
#define mmDC_LUT_BLACK_OFFSET_GREEN 0x1a82
#define mmDCP0_DC_LUT_BLACK_OFFSET_GREEN 0x1a82
#define mmDCP1_DC_LUT_BLACK_OFFSET_GREEN 0x1c82
#define mmDCP2_DC_LUT_BLACK_OFFSET_GREEN 0x1e82
#define mmDCP3_DC_LUT_BLACK_OFFSET_GREEN 0x4082
#define mmDCP4_DC_LUT_BLACK_OFFSET_GREEN 0x4282
#define mmDCP5_DC_LUT_BLACK_OFFSET_GREEN 0x4482
#define mmDC_LUT_BLACK_OFFSET_RED 0x1a83
#define mmDCP0_DC_LUT_BLACK_OFFSET_RED 0x1a83
#define mmDCP1_DC_LUT_BLACK_OFFSET_RED 0x1c83
#define mmDCP2_DC_LUT_BLACK_OFFSET_RED 0x1e83
#define mmDCP3_DC_LUT_BLACK_OFFSET_RED 0x4083
#define mmDCP4_DC_LUT_BLACK_OFFSET_RED 0x4283
#define mmDCP5_DC_LUT_BLACK_OFFSET_RED 0x4483
#define mmDC_LUT_WHITE_OFFSET_BLUE 0x1a84
#define mmDCP0_DC_LUT_WHITE_OFFSET_BLUE 0x1a84
#define mmDCP1_DC_LUT_WHITE_OFFSET_BLUE 0x1c84
#define mmDCP2_DC_LUT_WHITE_OFFSET_BLUE 0x1e84
#define mmDCP3_DC_LUT_WHITE_OFFSET_BLUE 0x4084
#define mmDCP4_DC_LUT_WHITE_OFFSET_BLUE 0x4284
#define mmDCP5_DC_LUT_WHITE_OFFSET_BLUE 0x4484
#define mmDC_LUT_WHITE_OFFSET_GREEN 0x1a85
#define mmDCP0_DC_LUT_WHITE_OFFSET_GREEN 0x1a85
#define mmDCP1_DC_LUT_WHITE_OFFSET_GREEN 0x1c85
#define mmDCP2_DC_LUT_WHITE_OFFSET_GREEN 0x1e85
#define mmDCP3_DC_LUT_WHITE_OFFSET_GREEN 0x4085
#define mmDCP4_DC_LUT_WHITE_OFFSET_GREEN 0x4285
#define mmDCP5_DC_LUT_WHITE_OFFSET_GREEN 0x4485
#define mmDC_LUT_WHITE_OFFSET_RED 0x1a86
#define mmDCP0_DC_LUT_WHITE_OFFSET_RED 0x1a86
#define mmDCP1_DC_LUT_WHITE_OFFSET_RED 0x1c86