commit 670bac3a8c201fc1f5f92ac6b4a8b42dc8172937
author Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Wed Sep 11 14:17:47 2013 -0500
committer Ralf Baechle <ralf@linux-mips.org> Fri Sep 13 11:59:51 2013 +0200
tree 45fd83bde9a24dd549ac05bc20b51bc1b21df769
parent 5359b938c088423a28c41499f183cd10824c1816

MIPS: Fix SMP core calculations when using MT support.

The TCBIND register is only available if the core has MT support. It
should not be read otherwise. Secondly, the number of TCs (siblings)
are calculated differently depending on if the kernel is configured
as SMVP or SMTC.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5822/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>