)]}'
{
  "commit": "6a7f6ec9512970874fa9fc883ea44d77d0f287c2",
  "tree": "2bce1665b5a9e81bdd95f6e34410bdf13c58350e",
  "parents": [
    "c6fa63c659b3dd121f21afe7529f505505e79b23",
    "4c65595ec506ff65c90b1d9fed17333005fa5eb5"
  ],
  "author": {
    "name": "Linus Torvalds",
    "email": "torvalds@linux-foundation.org",
    "time": "Tue Jan 18 08:05:20 2011 -0800"
  },
  "committer": {
    "name": "Linus Torvalds",
    "email": "torvalds@linux-foundation.org",
    "time": "Tue Jan 18 08:05:20 2011 -0800"
  },
  "message": "Merge branch \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu\n\n* \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: (25 commits)\n  m68knommu: fix broken setting of irq_chip and handler\n  m68knommu: switch to using -mcpu\u003d flags for ColdFire targets\n  m68knommu: arch/m68knommu/Kconfig whitespace cleanup\n  m68knommu: create optimal separate instruction and data cache for ColdFire\n  m68knommu: support ColdFire caches that do copyback and write-through\n  m68knommu: support version 2 ColdFire split cache\n  m68knommu: make cache push code ColdFire generic\n  m68knommu: clean up ColdFire cache control code\n  m68knommu: move inclusion of ColdFire v4 cache registers\n  m68knommu: merge bit definitions for version 3 ColdFire cache controller\n  m68knommu: create bit definitions for the version 2 ColdFire cache controller\n  m68knommu: remove empty __iounmap() it is no used\n  m68knommu: remove kernel_map() code, it is not used\n  m68knommu: remove do_page_fault(), it is not used\n  m68knommu: use user stack pointer hardware on some ColdFire cores\n  m68knommu: remove command line printing DEBUG\n  m68knommu: remove fasthandler interrupt code\n  m68knommu: move UART addressing to part specific includes\n  m68knommu: fix clock rate value reported for ColdFire 54xx parts\n  m68knommu: move ColdFire CPU names into their headers\n  ...\n",
  "tree_diff": []
}