)]}'
{
  "commit": "80b8987c8feaf07a070f7cdcd55db024e9e200ec",
  "tree": "8b279f1c71ed954b9a3d32036b6a1078899f14fc",
  "parents": [
    "d44a65f7bb0dae0bcc78de336b55a75b30ec2d2a"
  ],
  "author": {
    "name": "Sergei Shtylyov",
    "email": "sshtylyov@ru.mvista.com",
    "time": "Fri Aug 10 21:02:15 2007 +0400"
  },
  "committer": {
    "name": "Jeff Garzik",
    "email": "jeff@garzik.org",
    "time": "Wed Aug 15 04:19:07 2007 -0400"
  },
  "message": "pata_hpt{37x|3x2n}: fix clock reporting (take 2)\n\nFix several inconsistencies in these drivers WRT reporting the clocks:\n\n- when using DPLL mode, \u0027pata_hpt37x\u0027 driver reported the DPLL frequency as the\n  PCI clock -- make it properly report both clocks and add the same ability to\n  the \u0027pata_hpt3x2n\u0027 driver;\n\n- both drivers sometimes use \"pata_hpt3*:\" and sometimes \"hpt3*:\" in the\n  messages -- make them use only the former one;\n\n- the message about failed DPLL stablizatios deserves KERN_ERR and a bang. :-)\n\nSigned-off-by: Sergei Shtylyov \u003csshtylyov@ru.mvista.com\u003e\nSigned-off-by: Jeff Garzik \u003cjeff@garzik.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "96bbe7c39beed17aa1389eab1ee605bd4ed87299",
      "old_mode": 33188,
      "old_path": "drivers/ata/pata_hpt37x.c",
      "new_id": "c5ddd937dbf21a438af2cbe8fb0f2c385b88a774",
      "new_mode": 33188,
      "new_path": "drivers/ata/pata_hpt37x.c"
    },
    {
      "type": "modify",
      "old_id": "aa29cde09f8bbd594022f23a1e7803b6adfc5d87",
      "old_mode": 33188,
      "old_path": "drivers/ata/pata_hpt3x2n.c",
      "new_id": "f8f234bfc8ce2bc1ef075fccedd6df98d52fec2f",
      "new_mode": 33188,
      "new_path": "drivers/ata/pata_hpt3x2n.c"
    }
  ]
}