gem5 /
arm /
linux /
8b3bca2966985f559f9ace1effc98955006f2b05 ASoC: twl4030: Introduce local ctl register cache
Few registers need to be cached in the codec driver level. These registers
should only be written when the path is active to avoid pop noise on the
given path.
This patch adds an array which covers the range where the sensitive registers
are located and uppon loadinf the driver the ctl cache will be initialized.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
1 file changed