tree 3b63d5e765af3eedbc1cda84135f1b702a43a6f2
parent 3a2f735700332621274aca752be3b6f839fa47e7
author Ralf Baechle <ralf@linux-mips.org> 1142266589 +0000
committer Ralf Baechle <ralf@linux-mips.org> 1142701166 +0000

[MIPS] SB1: Fix interrupt disable hazard.
    
The SB1 core has a three cycle interrupt disable hazard but we were
wrongly treating it as fully interlocked.
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>