| commit | a627f025eb0534052ff451427c16750b3530634c | [log] [tgz] |
|---|---|---|
| author | yangbo lu <yangbo.lu@nxp.com> | Thu Apr 20 14:58:29 2017 +0800 |
| committer | Ulf Hansson <ulf.hansson@linaro.org> | Fri Apr 28 14:53:13 2017 +0200 |
| tree | 60a8e75c77fff90b506ddebdfa72a36348d001a5 | |
| parent | e145ac451eb68b51e0ede4c131bd5a539fb675b6 [diff] |
mmc: sdhci-of-esdhc: limit SD clock for ls1012a/ls1046a The ls1046a datasheet specified that the max SD clock frequency for eSDHC SDR104/HS200 was 167MHz, and the ls1012a datasheet specified it's 125MHz for ls1012a. So this patch is to add the limitation. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>