[SCSI] qla2xxx: Query additional RISC registers during ISP25XX firmware dump.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
diff --git a/drivers/scsi/qla2xxx/qla_dbg.c b/drivers/scsi/qla2xxx/qla_dbg.c
index 2defe0c..ca7f70d 100644
--- a/drivers/scsi/qla2xxx/qla_dbg.c
+++ b/drivers/scsi/qla2xxx/qla_dbg.c
@@ -1072,6 +1072,7 @@
}
fw = &ha->fw_dump->isp.isp25;
qla2xxx_prep_dump(ha, ha->fw_dump);
+ ha->fw_dump->version = __constant_htonl(2);
fw->host_status = htonl(RD_REG_DWORD(®->host_status));
@@ -1080,6 +1081,23 @@
if (rval != QLA_SUCCESS)
goto qla25xx_fw_dump_failed_0;
+ /* Host/Risc registers. */
+ iter_reg = fw->host_risc_reg;
+ iter_reg = qla24xx_read_window(reg, 0x7000, 16, iter_reg);
+ qla24xx_read_window(reg, 0x7010, 16, iter_reg);
+
+ /* PCIe registers. */
+ WRT_REG_DWORD(®->iobase_addr, 0x7C00);
+ RD_REG_DWORD(®->iobase_addr);
+ WRT_REG_DWORD(®->iobase_window, 0x01);
+ dmp_reg = ®->iobase_c4;
+ fw->pcie_regs[0] = htonl(RD_REG_DWORD(dmp_reg++));
+ fw->pcie_regs[1] = htonl(RD_REG_DWORD(dmp_reg++));
+ fw->pcie_regs[2] = htonl(RD_REG_DWORD(dmp_reg));
+ fw->pcie_regs[3] = htonl(RD_REG_DWORD(®->iobase_window));
+ WRT_REG_DWORD(®->iobase_window, 0x00);
+ RD_REG_DWORD(®->iobase_window);
+
/* Host interface registers. */
dmp_reg = ®->flash_addr;
for (cnt = 0; cnt < sizeof(fw->host_reg) / 4; cnt++)
diff --git a/drivers/scsi/qla2xxx/qla_dbg.h b/drivers/scsi/qla2xxx/qla_dbg.h
index cca4b0d..a50ecf0 100644
--- a/drivers/scsi/qla2xxx/qla_dbg.h
+++ b/drivers/scsi/qla2xxx/qla_dbg.h
@@ -215,6 +215,8 @@
struct qla25xx_fw_dump {
uint32_t host_status;
+ uint32_t host_risc_reg[32];
+ uint32_t pcie_regs[4];
uint32_t host_reg[32];
uint32_t shadow_reg[11];
uint32_t risc_io_reg;
diff --git a/drivers/scsi/qla2xxx/qla_fw.h b/drivers/scsi/qla2xxx/qla_fw.h
index db63386..25364b1 100644
--- a/drivers/scsi/qla2xxx/qla_fw.h
+++ b/drivers/scsi/qla2xxx/qla_fw.h
@@ -942,7 +942,7 @@
uint16_t mailbox31;
uint32_t iobase_window;
- uint32_t unused_4; /* Gap. */
+ uint32_t iobase_c4;
uint32_t iobase_c8;
uint32_t unused_4_1[6]; /* Gap. */
uint32_t iobase_q;