)]}'
{
  "commit": "e297d99e103f951a71fcb1534f1ff3480dd3a851",
  "tree": "7e8b044efeb0f1ea048acba881a00e8326a4a0ab",
  "parents": [
    "5dd34572ad9a3be430632dd42e4af2ea370b397b"
  ],
  "author": {
    "name": "Tejun Heo",
    "email": "htejun@gmail.com",
    "time": "Tue Jun 10 00:13:04 2008 +0900"
  },
  "committer": {
    "name": "Jeff Garzik",
    "email": "jgarzik@redhat.com",
    "time": "Fri Jun 13 02:46:17 2008 -0400"
  },
  "message": "ahci: workarounds for mcp65\n\nMCP65 ahci can do NCQ but doesn\u0027t set the CAP bit and rev A0 and A1\ncan\u0027t do MSI but have MSI capability.  Implement AHCI_HFLAG_YES_NCQ\nand apply appropriate workarounds.\n\nSigned-off-by: Tejun Heo \u003chtejun@gmail.com\u003e\nCc: Peer Chen \u003cpchen@nvidia.com\u003e\nSigned-off-by: Jeff Garzik \u003cjgarzik@redhat.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "544b7d6c617c848722d522955a1370d5a71d60e0",
      "old_mode": 33188,
      "old_path": "drivers/ata/ahci.c",
      "new_id": "1c62b8e396451d6f6373f54127956a7ace8fffad",
      "new_mode": 33188,
      "new_path": "drivers/ata/ahci.c"
    }
  ]
}