)]}'
{
  "commit": "f6dc1576cd517440313c9551b6ffa3d7e389c7c7",
  "tree": "b8b7e96634c2df9b8de85b5bb80923c2b6aeae97",
  "parents": [
    "22e43390456152f6e72ad2632e2b3fb363e94146"
  ],
  "author": {
    "name": "Scott Wood",
    "email": "oss@buserror.net",
    "time": "Thu Sep 22 03:35:17 2016 -0500"
  },
  "committer": {
    "name": "Will Deacon",
    "email": "will.deacon@arm.com",
    "time": "Fri Sep 23 17:19:25 2016 +0100"
  },
  "message": "arm64: arch_timer: Work around QorIQ Erratum A-008585\n\nErratum A-008585 says that the ARM generic timer counter \"has the\npotential to contain an erroneous value for a small number of core\nclock cycles every time the timer value changes\".  Accesses to TVAL\n(both read and write) are also affected due to the implicit counter\nread.  Accesses to CVAL are not affected.\n\nThe workaround is to reread TVAL and count registers until successive\nreads return the same value.  Writes to TVAL are replaced with an\nequivalent write to CVAL.\n\nThe workaround is to reread TVAL and count registers until successive reads\nreturn the same value, and when writing TVAL to retry until counter\nreads before and after the write return the same value.\n\nThe workaround is enabled if the fsl,erratum-a008585 property is found in\nthe timer node in the device tree.  This can be overridden with the\nclocksource.arm_arch_timer.fsl-a008585 boot parameter, which allows KVM\nusers to enable the workaround until a mechanism is implemented to\nautomatically communicate this information.\n\nThis erratum can be found on LS1043A and LS2080A.\n\nAcked-by: Marc Zyngier \u003cmarc.zyngier@arm.com\u003e\nSigned-off-by: Scott Wood \u003coss@buserror.net\u003e\n[will: renamed read macro to reflect that it\u0027s not usually unstable]\nSigned-off-by: Will Deacon \u003cwill.deacon@arm.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "4da60b463995464a71c04245e7f90e7ced4f51d2",
      "old_mode": 33188,
      "old_path": "Documentation/arm64/silicon-errata.txt",
      "new_id": "041e3a9437842fc09512995f091d29761d02e715",
      "new_mode": 33188,
      "new_path": "Documentation/arm64/silicon-errata.txt"
    },
    {
      "type": "modify",
      "old_id": "46c030a49186faabaa588afd2d284975c72c2017",
      "old_mode": 33188,
      "old_path": "Documentation/kernel-parameters.txt",
      "new_id": "fb4de4daba1f113b2c7840d9edc4e559528f600a",
      "new_mode": 33188,
      "new_path": "Documentation/kernel-parameters.txt"
    },
    {
      "type": "modify",
      "old_id": "7ff386c15539522a796d3785431a3316df642c84",
      "old_mode": 33188,
      "old_path": "arch/arm64/include/asm/arch_timer.h",
      "new_id": "eaa5bbe3fa8750f78b206b188e46ecee09f70de1",
      "new_mode": 33188,
      "new_path": "arch/arm64/include/asm/arch_timer.h"
    },
    {
      "type": "modify",
      "old_id": "567788664723d5b341000af69cc4e6194ab9025d",
      "old_mode": 33188,
      "old_path": "drivers/clocksource/Kconfig",
      "new_id": "8a753fd5b79d5116edfc4d3f891fee476a16ed83",
      "new_mode": 33188,
      "new_path": "drivers/clocksource/Kconfig"
    },
    {
      "type": "modify",
      "old_id": "57700541f95129e6f8f194ede23afeeda35842da",
      "old_mode": 33188,
      "old_path": "drivers/clocksource/arm_arch_timer.c",
      "new_id": "eb5fb4121ac84f52d2a5daaed033ff4288e5a5dd",
      "new_mode": 33188,
      "new_path": "drivers/clocksource/arm_arch_timer.c"
    }
  ]
}