diff --git a/README.md b/README.md
index d088834..e51d16c 100755
--- a/README.md
+++ b/README.md
@@ -194,6 +194,23 @@
 Contains scripts to create a disk image and to run SPEC-2006 tests on gem5.
 Instructions on how to use these scripts can be found here `src/spec2006-tests/README.md`.
 
+# Resource: SPEC 2017 tests
+
+The [Standard Performance Evaluation Corporation](
+https://www.spec.org/benchmarks.html) (SPEC) CPU 2017 benchmarks are designed
+to provide performance measurements that can be used to compare
+compute-intensive workloads on different computer systems. SPEC CPU 2017
+contains 43 benchmarks organized into four suites: SPECspeed 2017 Integer,
+SPECspeed 2017 Floating Point, SPECrate 2017 Integer, and SPECrate 2017
+Floating Point.
+
+`src/spec-2017` provides resources on creating a SPEC 2017 disk image, and
+necessary scripts to run the SPEC 2017 benchmarks within X86 gem5 simulations.
+Please consult the `src/spec-2017/README.md` for more information.
+
+**Please note, due to licensing issues, the SPEC 2017 iso cannot be provided
+as part of this repository.**
+
 # Resource: GAP Benchmark Suite (GAPBS) tests
 
 [GAPBS](http://gap.cs.berkeley.edu/benchmark.html) is a graph processing benchmark suite and it contains 6 kernels: Breadth-First Search, PageRank, Connected Components, Betweenness Centrality, Single-Source Shortest Paths, and Triangle Counting.
@@ -257,9 +274,12 @@
 `src/pthreads`.
 * **square**: Consult individual copyright notices of source files in
 `src/square`.
-* **spec2006-tests**: SPEC-2006 requires purchase of benchmark suite from
+* **spec2006-tests**: SPEC CPU 2006 requires purchase of benchmark suite from
 [SPEC](https://www.spec.org/cpu2006/) thus, it cannot be freely distributed.
 Consult individual copyright notices of source files in `src/spec2006-tests`.
+* **spec-2017**: SPEC CPU 2017 requires purchase of benchmark suite from
+[SPEC](https://www.spec.org/cpu2017/) thus, it cannot be freely distributed.
+Consult individual copyright notices of source files in `src/spec2017-tests`.
 * **gapbs**: Consult individual copyright notices of source files in
 `src/gapbs`.
 * **parsec**: The PARSEC license can be found at
@@ -270,3 +290,4 @@
 `src/npb`. The NAS Parallel Benchmarks utilize a permissive BSD-style license.
 * **boot-tests**: Consult individual copyright notices of source files in
 `src/boot-tests`.
+
diff --git a/src/spec-2017/README.md b/src/spec-2017/README.md
new file mode 100644
index 0000000..7c4730b
--- /dev/null
+++ b/src/spec-2017/README.md
@@ -0,0 +1,120 @@
+# SPEC 2017
+This document aims to provide instructions to create a gem5-compatible disk
+image containing the SPEC 2017 benchmark suite and also to provide necessary
+configuration files.
+
+## Building the Disk Image
+Creating a disk-image for SPEC 2017 requires the benchmark suite ISO file.
+More info about SPEC 2017 can be found [here](https://www.spec.org/cpu2017/).
+
+In this tutorial, we assume that the file `cpu2017-1.1.0.iso` contains the SPEC
+benchmark suite, and we provide the scripts that are made specifically for
+SPEC 2017 version 1.1.0.
+Throughout the this document, the root folder is `src/spec-2017/`.
+All commands should be run from the assumed root folder.
+
+The layout of the folder after the scripts are run is as follows,
+
+```
+spec-2017/
+  |___ gem5/                                   # gem5 folder
+  |
+  |___ disk-image/
+  |      |___ shared/
+  |      |___ spec-2017/
+  |      |      |___ spec-2017-image/
+  |      |      |      |___ spec2017           # the disk image will be generated here
+  |      |      |___ spec-2017.json            # the Packer script
+  |      |___ cpu2017-1.1.0.iso                # SPEC 2017 ISO (add here)
+  |
+  |___ configs
+  |      |___ system/
+  |      |___ run_spec.py                      # gem5 run script
+  |
+  |___ vmlinux-4.19.83                         # Linux kernel, link to download provided below
+  |
+  |___ README.md
+
+```
+
+First, to build `m5` (required for interactions between gem5 and the guest):
+
+```sh
+git clone https://gem5.googlesource.com/public/gem5
+cd gem5
+git checkout origin/develop
+cd util/m5
+scons build/x86/out/m5
+```
+
+We use [Packer](https://www.packer.io/), an open-source automated disk image
+creation tool, to build the disk image.
+In the root folder,
+
+```sh
+cd disk-image
+wget https://releases.hashicorp.com/packer/1.4.3/packer_1.4.3_linux_amd64.zip # download the packer binary
+unzip packer_1.4.3_linux_amd64.zip
+./packer validate spec-2017/spec-2017.json # validate the Packer script
+./packer build spec-2017/spec-2017.json
+```
+
+The path to the disk image is `spec-2017/spec-2017-image/spec2017`.
+Please refer to [this tutorial](https://gem5art.readthedocs.io/en/latest/tutorials/spec2017-tutorial.html#preparing-scripts-to-modify-the-disk-image)
+for more information about the scripts used in this document.
+
+## Linux Kernel
+The following link contains the compiled Linux kernel that was tested by
+running gem5-20 with SPEC 2017,
+- [vmlinux-4.19.83](http://dist.gem5.org/kernels/x86/static/vmlinux-4.19.83)
+
+## gem5 Configuration Scripts
+gem5 scripts which configure the system and run the simulation are available
+in `configs/`.
+The main script `run_spec.py` expects following arguments:
+
+`usage: run_spec.py [-h] [-l] [-z] kernel disk cpu benchmark size`
+
+`-h`: show this help message and exit.
+
+`-l`, `--no-copy-logs`: optional, to not copy SPEC run logs to the host system,
+logs are copied by default, and are available in the result folder.
+
+`-z`, `--allow-listeners`: optional, to turn on GDB listening ports, the ports
+are off by default.
+
+`kernel`: required, a positional argument specifying the path to the Linux
+kernel.
+
+`disk`: required, a positional argument specifying the path to the disk image
+containing SPEC 2017 benchmark suite.
+
+`cpu`: required, a positional argument specifying the name of either a
+detailed CPU model or KVM CPU model.
+
+The available CPU models are,
+
+| cpu    | Corresponding CPU model in gem5 |
+| ------ | ------------------------------- |
+| kvm    |                                 |
+| o3     | DerivO3CPU                      |
+| atomic | AtomicSimpleCPU                 |
+| timing | TimingSimpleCPU                 |
+
+`benchmark`: required, a positional argument specifying the name of the
+[SPEC 2017 workload](https://gem5art.readthedocs.io/en/latest/tutorials/spec2017-tutorial.html#appendix-i-working-spec-2017-benchmarks-x-cpu-model-table) to run.
+
+`size`: required, a positional argument specifying the input data size,
+must be one of {test, train, ref}.
+
+Assume the compiled Linux kernel is available in the assumed root folder, the
+following is an example of running a SPEC 2017 workload in full system mode,
+`
+gem5/build/X86/gem5.opt configs/run_spec.py -z vmlinux-4.19.83 disk-image/spec-2017/spec-2017-image/spec2017 atomic 403.gcc test
+`
+
+## Working Status
+Status of these benchmarks runs with respect to gem5-20, linux kernel version
+4.19.83 and gcc version 7.5.0 can be found
+[here](https://www.gem5.org/documentation/benchmark_status/#spec-2017-tests)
+
diff --git a/src/spec-2017/configs/run_spec.py b/src/spec-2017/configs/run_spec.py
new file mode 100644
index 0000000..b35d3d2
--- /dev/null
+++ b/src/spec-2017/configs/run_spec.py
@@ -0,0 +1,288 @@
+# -*- coding: utf-8 -*-
+# Copyright (c) 2019 The Regents of the University of California.
+# All rights reserved.
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Jason Lowe-Power, Ayaz Akram, Hoa Nguyen
+
+""" Script to run a SPEC benchmark in full system mode with gem5.
+
+    Inputs:
+    * This script expects the following as arguments:
+        ** kernel:
+                  This is a positional argument specifying the path to
+                  vmlinux.
+        ** disk:
+                  This is a positional argument specifying the path to the
+                  disk image containing the installed SPEC benchmarks.
+        ** cpu:
+                  This is a positional argument specifying the name of the
+                  detailed CPU model. The names of the available CPU models
+                  are available in the getDetailedCPUModel(cpu_name) function.
+                  The function should be modified to add new CPU models.
+                  Currently, the available CPU models are:
+                    - kvm: this is not a detailed CPU model, ideal for testing.
+                    - o3: DerivO3CPU.
+                    - atomic: AtomicSimpleCPU.
+                    - timing: TimingSimpleCPU.
+        ** benchmark:
+                  This is a positional argument specifying the name of the
+                  SPEC benchmark to run. Most SPEC benchmarks are available.
+                  Please follow this link to check the availability of the
+                  benchmarks. The working benchmark matrix is near the end
+                  of the page:
+         (SPEC 2006) https://gem5art.readthedocs.io/en/latest/tutorials/spec2006-tutorial.html#appendix-i-working-spec-2006-benchmarks-x-cpu-model-table
+         (SPEC 2017) https://gem5art.readthedocs.io/en/latest/tutorials/spec2017-tutorial.html#appendix-i-working-spec-2017-benchmarks-x-cpu-model-table
+        ** size:
+                  This is a positional argument specifying the size of the
+                  benchmark. The available sizes are: ref, test, train.
+        ** --no-copy-logs:
+                  This is an optional argument specifying the reports of
+                  the benchmark run is not copied to the output folder.
+                  The reports are copied by default.
+        ** --allow-listeners:
+                  This is an optional argument specifying gem5 to open GDB
+                  listening ports. Usually, the ports are opened for debugging
+                  purposes.
+                  By default, the ports are off.
+"""
+import os
+import sys
+
+import m5
+import m5.ticks
+from m5.objects import *
+
+import argparse
+
+from system import MySystem
+
+
+def writeBenchScript(dir, benchmark_name, size, output_path):
+    """
+    This method creates a script in dir which will be eventually
+    passed to the simulated system (to run a specific benchmark
+    at bootup).
+    """
+    input_file_name = '{}/run_{}_{}'.format(dir, benchmark_name, size)
+    with open(input_file_name, "w") as f:
+        f.write('{} {} {}'.format(benchmark_name, size, output_path))
+    return input_file_name
+
+def parse_arguments():
+    parser = argparse.ArgumentParser(description=
+                                "gem5 config file to run SPEC benchmarks")
+    parser.add_argument("kernel", type = str, help = "Path to vmlinux")
+    parser.add_argument("disk", type = str,
+                  help = "Path to the disk image containing SPEC benchmarks")
+    parser.add_argument("cpu", type = str, help = "Name of the detailed CPU")
+    parser.add_argument("benchmark", type = str,
+                        help = "Name of the SPEC benchmark")
+    parser.add_argument("size", type = str,
+                        help = "Available sizes: test, train, ref")
+    parser.add_argument("-l", "--no-copy-logs", default = False,
+                        action = "store_true",
+                        help = "Not to copy SPEC run logs to the host system;"
+                               "Logs are copied by default")
+    parser.add_argument("-z", "--allow-listeners", default = False,
+                        action = "store_true",
+                        help = "Turn on ports;"
+                               "The ports are off by default")
+    return parser.parse_args()
+
+def getDetailedCPUModel(cpu_name):
+    '''
+    Return the CPU model corresponding to the cpu_name.
+    '''
+    available_models = {"kvm": X86KvmCPU,
+                        "o3": DerivO3CPU,
+                        "atomic": AtomicSimpleCPU,
+                        "timing": TimingSimpleCPU
+                       }
+    try:
+        available_models["FlexCPU"] = FlexCPU
+    except NameError:
+        # FlexCPU is not defined
+        pass
+    # https://docs.python.org/3/library/stdtypes.html#dict.get
+    # dict.get() returns None if the key does not exist
+    return available_models.get(cpu_name)
+
+def getBenchmarkName(benchmark_name):
+    if benchmark_name.endswith("(base)"):
+        benchmark_name = benchmark_name[:-6]
+    return benchmark_name
+
+def create_system(linux_kernel_path, disk_image_path, detailed_cpu_model):
+    # create the system we are going to simulate
+    system = MySystem(kernel = linux_kernel_path,
+                      disk = disk_image_path,
+                      num_cpus = 1, # run the benchmark in a single thread
+                      no_kvm = False,
+                      TimingCPUModel = detailed_cpu_model)
+
+    # For workitems to work correctly
+    # This will cause the simulator to exit simulation when the first work
+    # item is reached and when the first work item is finished.
+    system.work_begin_exit_count = 1
+    system.work_end_exit_count = 1
+
+    # set up the root SimObject and start the simulation
+    root = Root(full_system = True, system = system)
+
+    if system.getHostParallel():
+        # Required for running kvm on multiple host cores.
+        # Uses gem5's parallel event queue feature
+        # Note: The simulator is quite picky about this number!
+        root.sim_quantum = int(1e9) # 1 ms
+
+    return root, system
+
+
+def boot_linux():
+    '''
+    Output 1: False if errors occur, True otherwise
+    Output 2: exit cause
+    '''
+    print("Booting Linux")
+    exit_event = m5.simulate()
+    exit_cause = exit_event.getCause()
+    success = exit_cause == "m5_exit instruction encountered"
+    if not success:
+        print("Error while booting linux: {}".format(exit_cause))
+        exit(1)
+    print("Booting done")
+    return success, exit_cause
+
+def run_spec_benchmark():
+    '''
+    Output 1: False if errors occur, True otherwise
+    Output 2: exit cause
+    '''
+    print("Start running benchmark")
+    exit_event = m5.simulate()
+    exit_cause = exit_event.getCause()
+    success = exit_cause == "m5_exit instruction encountered"
+    if not success:
+        print("Error while running benchmark: {}".format(exit_cause))
+        exit(1)
+    print("Benchmark done")
+    return success, exit_cause
+
+def copy_spec_logs():
+    '''
+    Output 1: False if errors occur, True otherwise
+    Output 2: exit cause
+    '''
+    print("Copying SPEC logs")
+    exit_event = m5.simulate()
+    exit_cause = exit_event.getCause()
+    success = exit_cause == "m5_exit instruction encountered"
+    if not success:
+        print("Error while copying SPEC log files: {}".format(exit_cause))
+        exit(1)
+    print("Copying done")
+    return success, exit_cause
+
+if __name__ == "__m5_main__":
+    args = parse_arguments()
+
+    cpu_name = args.cpu
+    benchmark_name = getBenchmarkName(args.benchmark)
+    benchmark_size = args.size
+    linux_kernel_path = args.kernel
+    disk_image_path = args.disk
+    no_copy_logs = args.no_copy_logs
+    allow_listeners = args.allow_listeners
+
+    if not no_copy_logs and not os.path.isabs(m5.options.outdir):
+        print("Please specify the --outdir (output directory) of gem5"
+              " in the form of an absolute path")
+        print("An example: build/X86/gem5.opt --outdir /home/user/m5out/"
+              " configs-spec-tests/run_spec ...")
+        exit(1)
+
+    output_dir = os.path.join(m5.options.outdir, "speclogs")
+
+    # Get the DetailedCPU class from its name
+    detailed_cpu = getDetailedCPUModel(cpu_name)
+    if detailed_cpu == None:
+        print("'{}' is not define in the config script.".format(cpu_name))
+        print("Change getDeatiledCPUModel() in run_spec.py "
+              "to add more CPU Models.")
+        exit(1)
+
+    if not benchmark_size in ["ref", "train", "test"]:
+        print("Benchmark size must be one of the following: ref, train, test")
+        exit(1)
+
+    root, system = create_system(linux_kernel_path, disk_image_path,
+                                 detailed_cpu)
+
+    # Create and pass a script to the simulated system to run the reuired
+    # benchmark
+    system.readfile = writeBenchScript(m5.options.outdir, benchmark_name,
+                                       benchmark_size, output_dir)
+
+    # needed for long running jobs
+    if not allow_listeners:
+        m5.disableAllListeners()
+
+    # instantiate all of the objects we've created above
+    m5.instantiate()
+
+    # booting linux
+    success, exit_cause = boot_linux()
+
+    # reset stats
+    print("Reset stats")
+    m5.stats.reset()
+
+    # switch from KVM to detailed CPU
+    if not cpu_name == "kvm":
+        print("Switching to detailed CPU")
+        system.switchCpus(system.cpu, system.detailed_cpu)
+        print("Switching done")
+
+    # running benchmark
+    print("Benchmark: {}; Size: {}".format(benchmark_name, benchmark_size))
+    success, exit_cause = run_spec_benchmark()
+
+    # output the stats after the benchmark is complete
+    print("Output stats")
+    m5.stats.dump()
+
+    if not no_copy_logs:
+        # create the output folder
+        if not os.path.exists(output_dir):
+            os.makedirs(output_dir)
+
+        # switch from detailed CPU to KVM
+        if not cpu_name == "kvm":
+            print("Switching to KVM")
+            system.switchCpus(system.detailed_cpu, system.cpu)
+            print("Switching done")
+
+        # copying logs
+        success, exit_cause = copy_spec_logs()
diff --git a/src/spec-2017/configs/system/__init__.py b/src/spec-2017/configs/system/__init__.py
new file mode 100644
index 0000000..099d7c5
--- /dev/null
+++ b/src/spec-2017/configs/system/__init__.py
@@ -0,0 +1,30 @@
+# -*- coding: utf-8 -*-
+# Copyright (c) 2016 Jason Lowe-Power
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Jason Lowe-Power
+
+from .system import MySystem
diff --git a/src/spec-2017/configs/system/caches.py b/src/spec-2017/configs/system/caches.py
new file mode 100644
index 0000000..b884aef
--- /dev/null
+++ b/src/spec-2017/configs/system/caches.py
@@ -0,0 +1,173 @@
+# -*- coding: utf-8 -*-
+# Copyright (c) 2016 Jason Lowe-Power
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Jason Lowe-Power
+
+""" Caches with options for a simple gem5 configuration script
+
+This file contains L1 I/D and L2 caches to be used in the simple
+gem5 configuration script.
+"""
+
+import m5
+from m5.objects import Cache, L2XBar, StridePrefetcher, SubSystem
+from m5.params import AddrRange, AllMemory, MemorySize
+from m5.util.convert import toMemorySize
+
+# Some specific options for caches
+# For all options see src/mem/cache/BaseCache.py
+
+class PrefetchCache(Cache):
+
+    def __init__(self):
+        super(PrefetchCache, self).__init__()
+
+class L1Cache(PrefetchCache):
+    """Simple L1 Cache with default values"""
+
+    assoc = 8
+    tag_latency = 1
+    data_latency = 1
+    response_latency = 1
+    mshrs = 16
+    tgts_per_mshr = 20
+    writeback_clean = True
+
+    def __init__(self):
+        super(L1Cache, self).__init__()
+        pass
+
+    def connectBus(self, bus):
+        """Connect this cache to a memory-side bus"""
+        self.mem_side = bus.slave
+
+    def connectCPU(self, cpu):
+        """Connect this cache's port to a CPU-side port
+           This must be defined in a subclass"""
+        raise NotImplementedError
+
+class L1ICache(L1Cache):
+    """Simple L1 instruction cache with default values"""
+
+    # Set the default size
+    size = '32kB'
+
+    def __init__(self):
+        super(L1ICache, self).__init__()
+
+    def connectCPU(self, cpu):
+        """Connect this cache's port to a CPU icache port"""
+        self.cpu_side = cpu.icache_port
+
+class L1DCache(L1Cache):
+    """Simple L1 data cache with default values"""
+
+    # Set the default size
+    size = '32kB'
+
+    def __init__(self):
+        super(L1DCache, self).__init__()
+
+    def connectCPU(self, cpu):
+        """Connect this cache's port to a CPU dcache port"""
+        self.cpu_side = cpu.dcache_port
+
+class MMUCache(Cache):
+    # Default parameters
+    size = '8kB'
+    assoc = 4
+    tag_latency = 1
+    data_latency = 1
+    response_latency = 1
+    mshrs = 20
+    tgts_per_mshr = 12
+    writeback_clean = True
+
+    def __init__(self):
+        super(MMUCache, self).__init__()
+
+    def connectCPU(self, cpu):
+        """Connect the CPU itb and dtb to the cache
+           Note: This creates a new crossbar
+        """
+        self.mmubus = L2XBar()
+        self.cpu_side = self.mmubus.master
+        for tlb in [cpu.itb, cpu.dtb]:
+            self.mmubus.slave = tlb.walker.port
+
+    def connectBus(self, bus):
+        """Connect this cache to a memory-side bus"""
+        self.mem_side = bus.slave
+
+class L2Cache(PrefetchCache):
+    """Simple L2 Cache with default values"""
+
+    # Default parameters
+    size = '256kB'
+    assoc = 16
+    tag_latency = 10
+    data_latency = 10
+    response_latency = 1
+    mshrs = 20
+    tgts_per_mshr = 12
+    writeback_clean = True
+
+    def __init__(self):
+        super(L2Cache, self).__init__()
+
+    def connectCPUSideBus(self, bus):
+        self.cpu_side = bus.master
+
+    def connectMemSideBus(self, bus):
+        self.mem_side = bus.slave
+
+class L3Cache(Cache):
+    """Simple L3 Cache bank with default values
+       This assumes that the L3 is made up of multiple banks. This cannot
+       be used as a standalone L3 cache.
+    """
+
+    # Default parameters
+    assoc = 32
+    tag_latency = 40
+    data_latency = 40
+    response_latency = 10
+    mshrs = 256
+    tgts_per_mshr = 12
+    clusivity = 'mostly_excl'
+
+    size = '4MB'
+
+    def __init__(self):
+        super(L3Cache, self).__init__()
+
+    def connectCPUSideBus(self, bus):
+        self.cpu_side = bus.master
+
+    def connectMemSideBus(self, bus):
+        self.mem_side = bus.slave
+
diff --git a/src/spec-2017/configs/system/fs_tools.py b/src/spec-2017/configs/system/fs_tools.py
new file mode 100644
index 0000000..99102ad
--- /dev/null
+++ b/src/spec-2017/configs/system/fs_tools.py
@@ -0,0 +1,40 @@
+# -*- coding: utf-8 -*-
+# Copyright (c) 2016 Jason Lowe-Power
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Jason Lowe-Power
+
+from m5.objects import IdeDisk, CowDiskImage, RawDiskImage
+
+class CowDisk(IdeDisk):
+
+    def __init__(self, filename):
+        super(CowDisk, self).__init__()
+        self.driveID = 'master'
+        self.image = CowDiskImage(child=RawDiskImage(read_only=True),
+                                  read_only=False)
+        self.image.child.image_file = filename
+
diff --git a/src/spec-2017/configs/system/system.py b/src/spec-2017/configs/system/system.py
new file mode 100644
index 0000000..6b4e79a
--- /dev/null
+++ b/src/spec-2017/configs/system/system.py
@@ -0,0 +1,320 @@
+# -*- coding: utf-8 -*-
+# Copyright (c) 2018 The Regents of the University of California
+# All Rights Reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Jason Lowe-Power
+import m5
+from m5.objects import *
+from m5.util import convert
+from .fs_tools import *
+from .caches import *
+
+class MySystem(System):
+    def __init__(self, kernel, disk, num_cpus, TimingCPUModel, no_kvm=False):
+        super(MySystem, self).__init__()
+        self._no_kvm = no_kvm
+        self._host_parallel = True
+        # Set up the clock domain and the voltage domain
+        self.clk_domain = SrcClockDomain()
+        self.clk_domain.clock = '2.3GHz'
+        self.clk_domain.voltage_domain = VoltageDomain()
+        mem_size = '32GB'
+        self.mem_ranges = [AddrRange('100MB'), # For kernel
+                           AddrRange(0xC0000000, size=0x100000), # For I/0
+                           AddrRange(Addr('4GB'), size = mem_size) # All data
+                           ]
+        # Create the main memory bus
+        # This connects to main memory
+        self.membus = SystemXBar(width = 64) # 64-byte width
+        self.membus.badaddr_responder = BadAddr()
+        self.membus.default = Self.badaddr_responder.pio
+        # Set up the system port for functional access from the simulator
+        self.system_port = self.membus.slave
+        self.initFS(self.membus, num_cpus)
+        # Replace these paths with the path to your disk images.
+        # The first disk is the root disk. The second could be used for swap
+        # or anything else.
+        self.setDiskImages(disk, disk)
+        # Change this path to point to the kernel you want to use
+        self.workload.object_file = kernel
+        # Options specified on the kernel command line
+        boot_options = ['earlyprintk=ttyS0', 'console=ttyS0', 'lpj=7999923',
+                         'root=/dev/hda1']
+        self.workload.command_line = ' '.join(boot_options)
+        # Create the CPUs for our system.
+        self.createCPU(num_cpus, TimingCPUModel)
+        # Create the cache heirarchy for the system.
+        self.createCacheHierarchy()
+        # Set up the interrupt controllers for the system (x86 specific)
+        self.setupInterrupts()
+        self.createMemoryControllersDDR4()
+        if self._host_parallel:
+            # To get the KVM CPUs to run on different host CPUs
+            # Specify a different event queue for each CPU
+            for i,cpu in enumerate(self.cpu):
+                for obj in cpu.descendants():
+                    obj.eventq_index = 0
+                cpu.eventq_index = i + 1
+    def getHostParallel(self):
+        return self._host_parallel
+    def totalInsts(self):
+        return sum([cpu.totalInsts() for cpu in self.cpu])
+    def createCPUThreads(self, cpu):
+        for c in cpu:
+            c.createThreads()
+    def createCPU(self, num_cpus, TimingCPUModel):
+        if self._no_kvm:
+            self.cpu = [AtomicSimpleCPU(cpu_id = i, switched_out = False)
+                              for i in range(num_cpus)]
+            self.createCPUThreads(self.cpu)
+            self.mem_mode = 'timing'
+        else:
+            # Note KVM needs a VM and atomic_noncaching
+            self.cpu = [X86KvmCPU(cpu_id = i)
+                        for i in range(num_cpus)]
+            self.createCPUThreads(self.cpu)
+            self.kvm_vm = KvmVM()
+            self.mem_mode = 'atomic_noncaching'
+            self.atomicCpu = [AtomicSimpleCPU(cpu_id = i,
+                                              switched_out = True)
+                              for i in range(num_cpus)]
+            self.createCPUThreads(self.atomicCpu)
+        self.detailed_cpu = [TimingCPUModel(cpu_id = i,
+                                     switched_out = True)
+                   for i in range(num_cpus)]
+        self.createCPUThreads(self.detailed_cpu)
+    def switchCpus(self, old, new):
+        assert(new[0].switchedOut())
+        m5.switchCpus(self, list(zip(old, new)))
+    def setDiskImages(self, img_path_1, img_path_2):
+        disk0 = CowDisk(img_path_1)
+        disk2 = CowDisk(img_path_2)
+        self.pc.south_bridge.ide.disks = [disk0, disk2]
+    def createCacheHierarchy(self):
+        # Create an L3 cache (with crossbar)
+        self.l3bus = L2XBar(width = 64,
+                            snoop_filter = SnoopFilter(max_capacity='32MB'))
+        for cpu in self.cpu:
+            # Create a memory bus, a coherent crossbar, in this case
+            cpu.l2bus = L2XBar()
+            # Create an L1 instruction and data cache
+            cpu.icache = L1ICache()
+            cpu.dcache = L1DCache()
+            cpu.mmucache = MMUCache()
+            # Connect the instruction and data caches to the CPU
+            cpu.icache.connectCPU(cpu)
+            cpu.dcache.connectCPU(cpu)
+            cpu.mmucache.connectCPU(cpu)
+            # Hook the CPU ports up to the l2bus
+            cpu.icache.connectBus(cpu.l2bus)
+            cpu.dcache.connectBus(cpu.l2bus)
+            cpu.mmucache.connectBus(cpu.l2bus)
+            # Create an L2 cache and connect it to the l2bus
+            cpu.l2cache = L2Cache()
+            cpu.l2cache.connectCPUSideBus(cpu.l2bus)
+            # Connect the L2 cache to the L3 bus
+            cpu.l2cache.connectMemSideBus(self.l3bus)
+        self.l3cache = L3Cache()
+        self.l3cache.connectCPUSideBus(self.l3bus)
+        # Connect the L3 cache to the membus
+        self.l3cache.connectMemSideBus(self.membus)
+    def setupInterrupts(self):
+        for cpu in self.cpu:
+            # create the interrupt controller CPU and connect to the membus
+            cpu.createInterruptController()
+            # For x86 only, connect interrupts to the memory
+            # Note: these are directly connected to the memory bus and
+            #       not cached
+            cpu.interrupts[0].pio = self.membus.master
+            cpu.interrupts[0].int_master = self.membus.slave
+            cpu.interrupts[0].int_slave = self.membus.master
+    # Memory latency: Using the smaller number from [3]: 96ns
+    def createMemoryControllersDDR4(self):
+        self._createMemoryControllers(8, DDR4_2400_16x4)
+    def _createMemoryControllers(self, num, cls):
+        kernel_controller = self._createKernelMemoryController(cls)
+        ranges = self._getInterleaveRanges(self.mem_ranges[-1], num, 7, 20)
+        self.mem_cntrls = [
+            cls(range = ranges[i],
+                port = self.membus.master)
+            for i in range(num)
+        ] + [kernel_controller]
+    def _createKernelMemoryController(self, cls):
+        return cls(range = self.mem_ranges[0],
+                   port = self.membus.master)
+    def _getInterleaveRanges(self, rng, num, intlv_low_bit, xor_low_bit):
+        from math import log
+        bits = int(log(num, 2))
+        if 2**bits != num:
+            m5.fatal("Non-power of two number of memory controllers")
+        intlv_bits = bits
+        ranges = [
+            AddrRange(start=rng.start,
+                      end=rng.end,
+                      intlvHighBit = intlv_low_bit + intlv_bits - 1,
+                      xorHighBit = xor_low_bit + intlv_bits - 1,
+                      intlvBits = intlv_bits,
+                      intlvMatch = i)
+                for i in range(num)
+            ]
+        return ranges
+    def initFS(self, membus, cpus):
+        self.pc = Pc()
+        self.workload = X86FsLinux()
+        # Constants similar to x86_traits.hh
+        IO_address_space_base = 0x8000000000000000
+        pci_config_address_space_base = 0xc000000000000000
+        interrupts_address_space_base = 0xa000000000000000
+        APIC_range_size = 1 << 12
+        # North Bridge
+        self.iobus = IOXBar()
+        self.bridge = Bridge(delay='50ns')
+        self.bridge.master = self.iobus.slave
+        self.bridge.slave = membus.master
+        # Allow the bridge to pass through:
+        #  1) kernel configured PCI device memory map address: address range
+        #  [0xC0000000, 0xFFFF0000). (The upper 64kB are reserved for m5ops.)
+        #  2) the bridge to pass through the IO APIC (two pages, already
+        #     contained in 1),
+        #  3) everything in the IO address range up to the local APIC, and
+        #  4) then the entire PCI address space and beyond.
+        self.bridge.ranges = \
+            [
+            AddrRange(0xC0000000, 0xFFFF0000),
+            AddrRange(IO_address_space_base,
+                      interrupts_address_space_base - 1),
+            AddrRange(pci_config_address_space_base,
+                      Addr.max)
+            ]
+        # Create a bridge from the IO bus to the memory bus to allow access
+        # to the local APIC (two pages)
+        self.apicbridge = Bridge(delay='50ns')
+        self.apicbridge.slave = self.iobus.master
+        self.apicbridge.master = membus.slave
+        self.apicbridge.ranges = [AddrRange(interrupts_address_space_base,
+                                            interrupts_address_space_base +
+                                            cpus * APIC_range_size
+                                            - 1)]
+        # connect the io bus
+        self.pc.attachIO(self.iobus)
+        # Add a tiny cache to the IO bus.
+        # This cache is required for the classic memory model for coherence
+        self.iocache = Cache(assoc=8,
+                            tag_latency = 50,
+                            data_latency = 50,
+                            response_latency = 50,
+                            mshrs = 20,
+                            size = '1kB',
+                            tgts_per_mshr = 12,
+                            addr_ranges = self.mem_ranges)
+        self.iocache.cpu_side = self.iobus.master
+        self.iocache.mem_side = self.membus.slave
+        self.intrctrl = IntrControl()
+        ###############################################
+        # Add in a Bios information structure.
+        self.workload.smbios_table.structures = [X86SMBiosBiosInformation()]
+        # Set up the Intel MP table
+        base_entries = []
+        ext_entries = []
+        for i in range(cpus):
+            bp = X86IntelMPProcessor(
+                    local_apic_id = i,
+                    local_apic_version = 0x14,
+                    enable = True,
+                    bootstrap = (i ==0))
+            base_entries.append(bp)
+        io_apic = X86IntelMPIOAPIC(
+                id = cpus,
+                version = 0x11,
+                enable = True,
+                address = 0xfec00000)
+        self.pc.south_bridge.io_apic.apic_id = io_apic.id
+        base_entries.append(io_apic)
+        pci_bus = X86IntelMPBus(bus_id = 0, bus_type='PCI   ')
+        base_entries.append(pci_bus)
+        isa_bus = X86IntelMPBus(bus_id = 1, bus_type='ISA   ')
+        base_entries.append(isa_bus)
+        connect_busses = X86IntelMPBusHierarchy(bus_id=1,
+                subtractive_decode=True, parent_bus=0)
+        ext_entries.append(connect_busses)
+        pci_dev4_inta = X86IntelMPIOIntAssignment(
+                interrupt_type = 'INT',
+                polarity = 'ConformPolarity',
+                trigger = 'ConformTrigger',
+                source_bus_id = 0,
+                source_bus_irq = 0 + (4 << 2),
+                dest_io_apic_id = io_apic.id,
+                dest_io_apic_intin = 16)
+        base_entries.append(pci_dev4_inta)
+        def assignISAInt(irq, apicPin):
+            assign_8259_to_apic = X86IntelMPIOIntAssignment(
+                    interrupt_type = 'ExtInt',
+                    polarity = 'ConformPolarity',
+                    trigger = 'ConformTrigger',
+                    source_bus_id = 1,
+                    source_bus_irq = irq,
+                    dest_io_apic_id = io_apic.id,
+                    dest_io_apic_intin = 0)
+            base_entries.append(assign_8259_to_apic)
+            assign_to_apic = X86IntelMPIOIntAssignment(
+                    interrupt_type = 'INT',
+                    polarity = 'ConformPolarity',
+                    trigger = 'ConformTrigger',
+                    source_bus_id = 1,
+                    source_bus_irq = irq,
+                    dest_io_apic_id = io_apic.id,
+                    dest_io_apic_intin = apicPin)
+            base_entries.append(assign_to_apic)
+        assignISAInt(0, 2)
+        assignISAInt(1, 1)
+        for i in range(3, 15):
+            assignISAInt(i, i)
+        self.workload.intel_mp_table.base_entries = base_entries
+        self.workload.intel_mp_table.ext_entries = ext_entries
+        entries = \
+           [
+            # Mark the first megabyte of memory as reserved
+            X86E820Entry(addr = 0, size = '639kB', range_type = 1),
+            X86E820Entry(addr = 0x9fc00, size = '385kB', range_type = 2),
+            # Mark the rest of physical memory as available
+            X86E820Entry(addr = 0x100000,
+                    size = '%dB' % (self.mem_ranges[0].size() - 0x100000),
+                    range_type = 1),
+            ]
+        # Mark [mem_size, 3GB) as reserved if memory less than 3GB, which
+        # force IO devices to be mapped to [0xC0000000, 0xFFFF0000). Requests
+        # to this specific range can pass though bridge to iobus.
+        entries.append(X86E820Entry(addr = self.mem_ranges[0].size(),
+            size='%dB' % (0xC0000000 - self.mem_ranges[0].size()),
+            range_type=2))
+        # Reserve the last 16kB of the 32-bit address space for m5ops
+        entries.append(X86E820Entry(addr = 0xFFFF0000, size = '64kB',
+                                    range_type=2))
+        # Add the rest of memory. This is where all the actual data is
+        entries.append(X86E820Entry(addr = self.mem_ranges[-1].start,
+            size='%dB' % (self.mem_ranges[-1].size()),
+            range_type=1))
+        self.workload.e820_table.entries = entries
diff --git a/src/spec-2017/disk-image/shared/preseed.cfg b/src/spec-2017/disk-image/shared/preseed.cfg
new file mode 100644
index 0000000..b5cd8a7
--- /dev/null
+++ b/src/spec-2017/disk-image/shared/preseed.cfg
@@ -0,0 +1,96 @@
+# Copyright (c) 2020 The Regents of the University of California.
+# SPDX-License-Identifier: BSD 3-Clause
+
+# Choosing keyboard layout
+d-i debian-installer/locale string en_US
+d-i console-setup/ask_detect boolean false
+d-i keyboard-configuration/xkb-keymap select us
+
+# Choosing network interface
+d-i netcfg/choose_interface select auto
+
+# Assigning hostname and domain
+d-i netcfg/get_hostname string gem5-host
+d-i netcfg/get_domain string gem5-domain
+
+d-i netcfg/wireless_wep string
+
+# https://unix.stackexchange.com/q/216348
+# The above link says there's no way to not to set a mirror
+# Should choose a local minor
+d-i mirror/country string manual
+d-i mirror/http/hostname string archive.ubuntu.com
+d-i mirror/http/directory string /ubuntu
+d-i mirror/http/proxy string
+
+# Setting up `root` password
+d-i passwd/root-login boolean false
+
+# Creating a normal user account. This account has sudo permission.
+d-i passwd/user-fullname string gem5
+d-i passwd/username string gem5
+d-i passwd/user-password password 12345
+d-i passwd/user-password-again password 12345
+d-i user-setup/allow-password-weak boolean true
+
+# No home folder encryption
+d-i user-setup/encrypt-home boolean false
+
+# Choosing the clock timezone
+d-i clock-setup/utc boolean true
+d-i time/zone string US/Eastern
+d-i clock-setup/ntp boolean true
+
+# Choosing partition scheme
+# This setting should result in MBR
+# gem5 doesn't work with logical volumes
+d-i partman-auto/method string regular
+d-i partman-lvm/device_remove_lvm boolean true
+d-i partman-md/device_remove_md boolean true
+d-i partman-lvm/confirm boolean true
+d-i partman-lvm/confirm_nooverwrite boolean true
+
+# Ignoring an option to set the home folder in another partition
+d-i partman-auto/choose_recipe select atomic
+
+# Finishing disk partition settings
+d-i partman-md/confirm boolean true
+d-i partman-partitioning/confirm_write_new_label boolean true
+d-i partman/choose_partition select finish
+d-i partman/confirm boolean true
+d-i partman/confirm_nooverwrite boolean true
+
+# Installing standard packages and ubuntu-server packages
+# More details about ubuntu standard packages:
+# https://packages.ubuntu.com/bionic/ubuntu-standard
+# More details about ubuntu-server packages:
+# https://packages.ubuntu.com/bionic/ubuntu-server
+tasksel tasksel/first multiselect standard, ubuntu-server
+
+# openssh-server is required for communicating with Packer
+# build-essential has standard compiling tools, could be removed
+d-i pkgsel/include string openssh-server build-essential
+# No package upgrade
+d-i pkgsel/upgrade select none
+
+# Updating packages automatically is unnecessary
+d-i pkgsel/update-policy select none
+
+# Choosing not to report installed software to some servers
+popularity-contest popularity-contest/participate boolean false
+
+# Installing grub
+d-i grub-installer/only_debian boolean true
+
+# Specifying which partition to boot
+d-i grub-installer/bootdev  string /dev/sda
+
+# Install to the above partition
+d-i grub-installer/bootdev  string default
+
+# Answering the prompt saying the installation is finished
+d-i finish-install/reboot_in_progress note
+
+# Answering the prompt saying no bootloader is installed
+# This will appear if grub is not installed
+nobootloader nobootloader/confirmation_common note
diff --git a/src/spec-2017/disk-image/shared/serial-getty@.service b/src/spec-2017/disk-image/shared/serial-getty@.service
new file mode 100644
index 0000000..b0424f0
--- /dev/null
+++ b/src/spec-2017/disk-image/shared/serial-getty@.service
@@ -0,0 +1,46 @@
+#  SPDX-License-Identifier: LGPL-2.1+
+#
+#  This file is part of systemd.
+#
+#  systemd is free software; you can redistribute it and/or modify it
+#  under the terms of the GNU Lesser General Public License as published by
+#  the Free Software Foundation; either version 2.1 of the License, or
+#  (at your option) any later version.
+
+[Unit]
+Description=Serial Getty on %I
+Documentation=man:agetty(8) man:systemd-getty-generator(8)
+Documentation=http://0pointer.de/blog/projects/serial-console.html
+BindsTo=dev-%i.device
+After=dev-%i.device systemd-user-sessions.service plymouth-quit-wait.service getty-pre.target
+After=rc-local.service
+
+# If additional gettys are spawned during boot then we should make
+# sure that this is synchronized before getty.target, even though
+# getty.target didn't actually pull it in.
+Before=getty.target
+IgnoreOnIsolate=yes
+
+# IgnoreOnIsolate causes issues with sulogin, if someone isolates
+# rescue.target or starts rescue.service from multi-user.target or
+# graphical.target.
+Conflicts=rescue.service
+Before=rescue.service
+
+[Service]
+# The '-o' option value tells agetty to replace 'login' arguments with an
+# option to preserve environment (-p), followed by '--' for safety, and then
+# the entered username.
+ExecStart=-/sbin/agetty --autologin root --keep-baud 115200,38400,9600 %I $TERM
+Type=idle
+Restart=always
+UtmpIdentifier=%I
+TTYPath=/dev/%I
+TTYReset=yes
+TTYVHangup=yes
+KillMode=process
+IgnoreSIGPIPE=no
+SendSIGHUP=yes
+
+[Install]
+WantedBy=getty.target
diff --git a/src/spec-2017/disk-image/spec-2017/install-spec2017.sh b/src/spec-2017/disk-image/spec-2017/install-spec2017.sh
new file mode 100644
index 0000000..2d6a87d
--- /dev/null
+++ b/src/spec-2017/disk-image/spec-2017/install-spec2017.sh
@@ -0,0 +1,40 @@
+# Copyright (c) 2020 The Regents of the University of California.
+# SPDX-License-Identifier: BSD 3-Clause
+
+# install build-essential (gcc and g++ included) and gfortran
+echo "12345" | sudo DEBIAN_FRONTEND=noninteractive apt-get install -y build-essential gfortran
+
+# mount the SPEC2017 ISO file and install SPEC to the disk image
+mkdir /home/gem5/mnt
+mount -o loop -t iso9660 /home/gem5/cpu2017-1.1.0.iso /home/gem5/mnt
+mkdir /home/gem5/spec2017
+echo "y" | /home/gem5/mnt/install.sh -d /home/gem5/spec2017 -u linux-x86_64
+cd /home/gem5/spec2017
+. /home/gem5/mnt/shrc
+umount /home/gem5/mnt
+rm -f /home/gem5/cpu2017-1.1.0.iso
+
+# use the example config as the template
+cp /home/gem5/spec2017/config/Example-gcc-linux-x86.cfg /home/gem5/spec2017/config/myconfig.x86.cfg
+
+# use sed command to replace the default gcc_dir
+sed -i "s/\/opt\/rh\/devtoolset-7\/root\/usr/\/usr/g" /home/gem5/spec2017/config/myconfig.x86.cfg
+
+# use sed command to remove the march=native flag when compiling
+# this is necessary as the packer script runs in kvm mode, so the details of the CPU will be that of the host CPU
+# the -march=native flag is removed to avoid compiling instructions that gem5 does not support
+# finetuning flags should be manually added
+sed -i "s/-march=native//g" /home/gem5/spec2017/config/myconfig.x86.cfg
+
+# prevent runcpu from calling sysinfo
+# https://www.spec.org/cpu2017/Docs/config.html#sysinfo-program
+# this is necessary as the sysinfo program queries the details of the system's CPU
+# the query causes gem5 runtime error
+sed -i "s/command_add_redirect = 1/sysinfo_program =\ncommand_add_redirect = 1/g" /home/gem5/spec2017/config/myconfig.x86.cfg
+
+# build all SPEC workloads
+runcpu --config=myconfig.x86.cfg --define build_ncpus=$(nproc) --action=build all
+
+# the above building process will produce a large log file
+# this command removes the log files to avoid copying out large files unnecessarily
+rm -f /home/gem5/spec2017/result/*
diff --git a/src/spec-2017/disk-image/spec-2017/post-installation.sh b/src/spec-2017/disk-image/spec-2017/post-installation.sh
new file mode 100644
index 0000000..0ecb806
--- /dev/null
+++ b/src/spec-2017/disk-image/spec-2017/post-installation.sh
@@ -0,0 +1,16 @@
+#!/bin/bash
+
+# Copyright (c) 2020 The Regents of the University of California.
+# SPDX-License-Identifier: BSD 3-Clause
+
+echo 'Post Installation Started'
+
+mv /home/gem5/serial-getty@.service /lib/systemd/system/
+
+mv /home/gem5/m5 /sbin
+ln -s /sbin/m5 /sbin/gem5
+
+# copy and run outside (host) script after booting
+cat /home/gem5/runscript.sh >> /root/.bashrc
+
+echo 'Post Installation Done'
diff --git a/src/spec-2017/disk-image/spec-2017/runscript.sh b/src/spec-2017/disk-image/spec-2017/runscript.sh
new file mode 100644
index 0000000..922af4f
--- /dev/null
+++ b/src/spec-2017/disk-image/spec-2017/runscript.sh
@@ -0,0 +1,37 @@
+#!/bin/sh
+
+# Copyright (c) 2020 The Regents of the University of California.
+# SPDX-License-Identifier: BSD 3-Clause
+
+# This file is the script that runs on the gem5 guest. This reads a file from the host via m5 readfile
+# which contains the workload and the size to run. Then it resets the stats before running the workload.
+# Finally, it exits the simulation after running the workload, then it copies out the result file to be checked.
+
+cd /home/gem5/spec2017
+source shrc
+m5 readfile > workloads
+echo "Done reading workloads"
+if [ -s workloads ]; then
+    # if the file is not empty, run spec with the parameters
+    echo "Workload detected"
+    echo "Reset stats"
+    m5 exit
+
+    # run the commands
+    read -r workload size m5filespath < workloads
+    runcpu --size $size --iterations 1 --config myconfig.x86.cfg --noreportable --nobuild $workload
+    m5 exit
+
+    # copy the SPEC result files to host
+    for filepath in /home/gem5/spec2017/result/*; do
+        filename=$(basename $filepath)
+        m5 writefile $filepath $m5filespath/$filename
+    done
+    m5 exit
+else
+    echo "Couldn't find any workload"
+    m5 exit
+    m5 exit
+    m5 exit
+fi
+# otherwise, drop to the terminal
diff --git a/src/spec-2017/disk-image/spec-2017/spec-2017.json b/src/spec-2017/disk-image/spec-2017/spec-2017.json
new file mode 100644
index 0000000..e20eeeb
--- /dev/null
+++ b/src/spec-2017/disk-image/spec-2017/spec-2017.json
@@ -0,0 +1,107 @@
+{
+    "_author": "Hoa Nguyen <hoanguyen@ucdavis.edu>, Ayaz Akram <yazakram@ucdavis.edu>",
+    "_license": "Copyright (c) 2020 The Regents of the University of California. SPDX-License-Identifier: BSD 3-Clause",
+    "builders":
+    [
+        {
+            "type": "qemu",
+            "format": "raw",
+            "accelerator": "kvm",
+            "boot_command":
+            [
+                "{{ user `boot_command_prefix` }}",
+                "debian-installer={{ user `locale` }} auto locale={{ user `locale` }} kbd-chooser/method=us ",
+                "file=/floppy/{{ user `preseed` }} ",
+                "fb=false debconf/frontend=noninteractive ",
+                "hostname={{ user `hostname` }} ",
+                "/install/vmlinuz noapic ",
+                "initrd=/install/initrd.gz ",
+                "keyboard-configuration/modelcode=SKIP keyboard-configuration/layout=USA ",
+                "keyboard-configuration/variant=USA console-setup/ask_detect=false ",
+                "passwd/user-fullname={{ user `ssh_fullname` }} ",
+                "passwd/user-password={{ user `ssh_password` }} ",
+                "passwd/user-password-again={{ user `ssh_password` }} ",
+                "passwd/username={{ user `ssh_username` }} ",
+                "-- <enter>"
+            ],
+            "cpus": "{{ user `vm_cpus`}}",
+            "disk_size": "{{ user `image_size` }}",
+            "floppy_files":
+            [
+                "shared/{{ user `preseed` }}"
+            ],
+            "headless": "{{ user `headless` }}",
+            "http_directory": "shared",
+            "iso_checksum": "{{ user `iso_checksum` }}",
+            "iso_checksum_type": "{{ user `iso_checksum_type` }}",
+            "iso_urls": [ "{{ user `iso_url` }}" ],
+            "memory": "{{ user `vm_memory`}}",
+            "output_directory": "spec2017/{{ user `image_name` }}-image",
+            "qemuargs":
+            [
+                [ "-cpu", "host" ],
+                [ "-display", "none" ]
+            ],
+            "qemu_binary":"/usr/bin/qemu-system-x86_64",
+            "shutdown_command": "echo '{{ user `ssh_password` }}'|sudo -S shutdown -P now",
+            "ssh_password": "{{ user `ssh_password` }}",
+            "ssh_username": "{{ user `ssh_username` }}",
+            "ssh_wait_timeout": "60m",
+            "vm_name": "{{ user `image_name` }}"
+        }
+    ],
+    "provisioners":
+    [
+        {
+            "type": "file",
+            "source": "../gem5/util/m5/build/x86/out/m5",
+            "destination": "/home/gem5/"
+        },
+        {
+            "type": "file",
+            "source": "shared/serial-getty@.service",
+            "destination": "/home/gem5/"
+        },
+        {
+            "type": "file",
+            "source": "spec2017/runscript.sh",
+            "destination": "/home/gem5/"
+        },
+        {
+            "type": "file",
+            "source": "spec2017/cpu2017-1.1.0.iso",
+            "destination": "/home/gem5/"
+        },
+        {
+            "type": "shell",
+            "execute_command": "echo '{{ user `ssh_password` }}' | {{.Vars}} sudo -E -S bash '{{.Path}}'",
+            "scripts":
+            [
+                "spec2017/post-installation.sh",
+                "spec2017/install-spec2017.sh"
+            ]
+        }
+    ],
+    "variables":
+    {
+        "boot_command_prefix": "<enter><wait><f6><esc><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs><bs>",
+        "desktop": "false",
+        "image_size": "12000",
+        "headless": "true",
+        "iso_checksum": "34416ff83179728d54583bf3f18d42d2",
+        "iso_checksum_type": "md5",
+        "iso_name": "ubuntu-18.04.2-server-amd64.iso",
+        "iso_url": "http://old-releases.ubuntu.com/releases/18.04.2/ubuntu-18.04.2-server-amd64.iso",
+        "locale": "en_US",
+        "preseed" : "preseed.cfg",
+        "hostname": "gem5",
+        "ssh_fullname": "gem5",
+        "ssh_password": "12345",
+        "ssh_username": "gem5",
+        "vm_cpus": "4",
+        "vm_memory": "8192",
+        "image_name": "spec2017"
+  }
+
+}
+