website: Add isca '23 schedule
Also includes poster session information and minor updates to the event
page.
Change-Id: I3ed2c18839e54fa1af5484bcfe895950f88f27a7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5-website/+/71358
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: Bobby Bruce <bbruce@ucdavis.edu>
diff --git a/_pages/events/isca-2023.md b/_pages/events/isca-2023.md
index 2e7f614..ab9d218 100644
--- a/_pages/events/isca-2023.md
+++ b/_pages/events/isca-2023.md
@@ -10,14 +10,15 @@
## Key Dates
-* Submission deadline: **April 24th 2023 (AOE)**
-* Notification of acceptance and time-slot awarded: **May 1st 2023**
+* ~~Submission deadline: **April 24th 2023 (AOE)**~~
+* ~~Notification of acceptance and time-slot awarded: **May 1st 2023**~~
* ISCA dates: **June 17th to June 21st 2023**
* Workshop date: **June 17th 2023**
## Call for Presentations
-**Note:** The call for presentations is now closed.
+**Note:** The deadline for submitting presentations has passed.
+This call is kept here for archival purposes.
The gem5 simulator is an open-source platform that enables the modeling and simulation of computer systems at different levels of abstraction, including processor, memory hierarchy, and interconnects.
It is widely used in academia and industry for research, education, and design space exploration.
@@ -65,24 +66,44 @@
We look forward to receiving your proposals and seeing you at the gem5 Workshop!
-## Accepted Talks
+## Room and Venue
-* **dBscope - Infrastructure to enable fine-grained characterization of database workloads on gem5** by Cesar Avalos and Christin Bose (Purdue University)
-* **Improving gem5's GPUFS Support** by Vishnu Ramadas, Matthew Poremba, Bradford M. Beckmann, and Matthew D. Sinclair (University of Wisconsin, Madison/AMD Research)
-* **Far Atomic Memory Operations in gem5** by Victor Soria-Pardos (Barcelona Supercomputing Center)
-* **The Looppoint methodology and CPU tuning in the gem5 Simulator** by Zhantong Qiu (University of California, Davis)
-* **Analyzing the benefits of more complex cache replacement policies in modern GPU LLCs** by Jarvis Jia and Matthew D. Sinclair (University of Wisconsin, Madison)
-* **Modern front-end support in gem5** by Bhargav Reddy Godala (Princeton University)
-* **Towards a hardware codelet program execution model for heterogeneous chiplet-based system simulation** by Dawson Fox, Jose M. Monsalve Diaz, and Xiaoming Li (University of Delaware/Argonne National Laboratory)
-* **Perils and Promises of Simulation Methodologies in gem5** by Maryam Babaie, Ayaz Akram, and Jason Lowe-Power (University of California, Davis)
-* **Closing the Gap: Improving the Accuracy of gem5's GPU Models** by Vishnu Ramadas, Daniel Kouchekinia, Ndubuisi Osuji, and Matthew D. Sinclair (University of Wisconsin, Madison)
-* **Sustainable gem5 Simulations** by Mohammad Alian (University of Kansas)
-* **High performance tracing and visualization for ESL design** by Gabriel Busnot and Said Derradiji (Arteris IP)
+The workshop will be held in the **Canary 1** room of the [Marriott World Center Orlando](https://www.marriott.com/hotels/travel/mcowc-orlando-world-center-marriott/).
-**Note:** This is a list of accepted presentations.
-The schedule will be posted when finalized.
+## Schedule
-## Accepted Posters
+| --- | --- | ----| --- |
+| Time slot | Event / Presentation title | Work By | Affiliation(s) |
+| --- | --- | --- | --- |
+| 9:00 - 9:25 | Welcome and Keynote: gem5 v22, v23 and the future | Bobby R. Bruce | University of California, Davis |
+| 9:25 - 9:40 | Closing the Gap: Improving the Accuracy of gem5's GPU Models | Vishnu Ramadas, Daniel Kouchekinia, Ndubuisi Osuji, and Matthew D. Sinclair | University of Wisconsin, Madison |
+| 9:40 - 10:05 | Looppoint in the gem5 Simulator | Zhantong Qiu | University of California, Davis |
+| 10:05 - 10:20 | Sustainable gem5 Simulations | Mohammad Alian | University of Kansas |
+| 10:20 - 10:35 | Far Atomic Memory Operations in gem5 | Victor Soria-Pardos | Barcelona Supercomputing Center |
+| 10:35 - 11:00 | Towards a hardware codelet program execution model for heterogeneous chiplet-based system simulation | Dawson Fox, Jose M. Monsalve Diaz, and Xiaoming Li | University of Delaware/Argonne National Laboratory |
+| 11:00 - 11:20 | Coffee Break | --- | --- |
+| 11:20 - 12:30 | Panel Session: "The Future of gem5" | --- | --- |
+| 12:30 - 14:00 | Lunch Break | --- | --- |
+| 14:00 - 14:25 | Modern front-end support in gem5 | Bhargav Reddy Godala | Princeton University |
+| 14:25 - 14:40 | Improving gem5's GPUFS Support | Vishnu Ramadas, Matthew Poremba, Bradford M. Beckmann, and Matthew D. Sinclair | University of Wisconsin, Madison/AMD Research |
+| 14:40 - 14:55 | Perils and Promises of Simulation Methodologies in gem5 | Maryam Babaie, Ayaz Akram, and Jason Lowe-Power | University of California, Davis |
+| 14:55 - 15:30 | Lightening Talks and Poster Session | --- | --- |
+| 15:30 - 16:00 | Coffee Break | --- | --- |
+| 16:00 - 16:15 | Analyzing the benefits of more complex cache replacement policies in modern GPU LLCs | Jarvis Jia and Matthew D. Sinclair | University of Wisconsin, Madison |
+| 16:15 - 16:40 | High performance tracing and visualization for ESL design | Gabriel Busnot and Said Derradiji | Arteris IP |
+| 16:40 - 17:00 | Closing Remarks and Awards | --- | --- |
+| --- | --- | ----| --- |
+
+## Poster Session
+
+The workshop will feature a poster session to start at **14:55**.
+This session will begin with a series of lightening talks by our accepted posters (3 minutes each, 1 slide) prior to a traditional poster session held in the same room.
+
+The posters session is immediately before the 15:30 coffee break and may continue into the break if there is sufficient interest.
+
+Those with posters may hang their poster at the start of the workshop (from 9:00) for viewing during the coffee breaks and lunch.
+
+### Accepted Posters
* **Analyzing Google Workload Traces in gem5** by Ayaz Akram, Maryam Babaie, and Jason Lowe-Power (University of California, Davis)
* **Octopi-cache: An AMD EPYC-like Three-Level Cache Model in gem5** by Hoa Nguyen and Jason Lowe-Power (University of California, Davis)
