tree c6471d52627e26c76caa372902d00c2273cb228f
parent e2b5c15f193c02e607d5d8fd9c09a0a9a5efc213
author Nils Asmussen <nilsasmussen7@gmail.com> 1580377343 +0100
committer Gabe Black <gabeblack@google.com> 1580945206 +0000

arch-arm: make MicroUopSetPCCPSR SerializeAfter

Updating CPSR needs to be SerializeAfter to ensure that all following
instructions are executed with the new CPSR. Otherwise, for example,
the following instructions will access the banked registers from the
previous mode.

The missing IsSerializeAfter had the consequence that the instruction
rfe (return from exception) did not work correctly with the DerivO3CPU
model.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-303

Change-Id: I999623c0fc92cfcd4c3550b9cb34e8564a92e3e6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24943
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
(cherry picked from commit 0d665d4f9893320db4f3b5f7014a6e10c3420b69)
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25013
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>