components_library/processors/simple_core.py

# Copyright (c) 2021 The Regents of the University of California
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from components_library.runtime import get_runtime_isa
from components_library.processors.abstract_core import AbstractCore

from .cpu_types import CPUTypes
from ..isas import ISA
from ..utils.override import overrides

from m5.objects import (
    Port,
    AtomicSimpleCPU,
    DerivO3CPU,
    TimingSimpleCPU,
    X86KvmCPU,
    BaseCPU,
    Process,
)


class SimpleCore(AbstractCore):
    def __init__(self, cpu_type: CPUTypes, core_id: int):
        super(SimpleCore, self).__init__(cpu_type=cpu_type)

        if cpu_type == CPUTypes.ATOMIC:
            self.core = AtomicSimpleCPU(cpu_id=core_id)
        elif cpu_type == CPUTypes.O3:
            self.core = DerivO3CPU(cpu_id=core_id)
        elif cpu_type == CPUTypes.TIMING:
            self.core = TimingSimpleCPU(cpu_id=core_id)
        elif cpu_type == CPUTypes.KVM:
            self.core = X86KvmCPU(cpu_id=core_id)
        else:
            raise NotImplementedError

        self.core.createThreads()

    def get_simobject(self) -> BaseCPU:
        return self.core

    @overrides(AbstractCore)
    def connect_icache(self, port: Port) -> None:
        self.core.icache_port = port

    @overrides(AbstractCore)
    def connect_dcache(self, port: Port) -> None:
        self.core.dcache_port = port

    @overrides(AbstractCore)
    def connect_walker_ports(self, port1: Port, port2: Port) -> None:
        self.core.mmu.connectWalkerPorts(port1, port2)

    @overrides(AbstractCore)
    def set_workload(self, process: Process) -> None:
        self.core.workload = process

    @overrides(AbstractCore)
    def set_switched_out(self, value: bool) -> None:
        self.core.switched_out = value

    @overrides(AbstractCore)
    def connect_interrupt(
        self, interrupt_requestor: Port, interrupt_responce: Port
    ) -> None:

        # TODO: This model assumes that we will only create an interrupt
        # controller as we require it. Not sure how true this is in all cases.
        self.core.createInterruptController()

        if get_runtime_isa() == ISA.X86:
            self.core.interrupts[0].pio = interrupt_requestor
            self.core.interrupts[0].int_requestor = interrupt_responce
            self.core.interrupts[0].int_responder = interrupt_requestor