commit 112f4104b94807a4db56e44cd649013c4f7c6404
author Gabe Black <gabe.black@gmail.com> Sun Aug 29 00:37:15 2021 -0700
committer Gabe Black <gabe.black@gmail.com> Wed Jun 08 20:34:38 2022 +0000
tree d48cf2ec9ad5a886f415886300197ad66c7e0b9b
parent 7f61db0f2ec22a9ec9f6dbf174906b7bc46492bd

arch-arm: Fix up code related to the float reg file?

ARM no longer uses it's primitive FloatRegClass register file, but the
code in tarmac_record.cc still seems to access it? Should this code be
deleted, or rewritten to use the vector register file?

This code was used in the 32 bit ARM KVM code as well.

Change-Id: I6ed2ed9ae853fa4313294fdde4ce08d134fc12da
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49767
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>

src/arch/arm/kvm/arm_cpu.cc

diff --git a/src/arch/arm/kvm/arm_cpu.cc b/src/arch/arm/kvm/arm_cpu.cc
index becb6b9..42aeea6 100644
--- a/src/arch/arm/kvm/arm_cpu.cc
+++ b/src/arch/arm/kvm/arm_cpu.cc
@@ -773,8 +773,8 @@
         const unsigned idx_hi = idx_base + 1;
         const unsigned idx_lo = idx_base + 0;
         uint64_t value =
-            ((uint64_t)tc->readFloatRegFlat(idx_hi) << 32) |
-            tc->readFloatRegFlat(idx_lo);
+            ((uint64_t)tc->getRegFlat(RegId(FloatRegClass, idx_hi)) << 32) |
+            tc->getRegFlat(RegId(FloatRegClass, idx_lo));
 
         setOneReg(id, value);
     } else if (regIsVfpCtrl(id)) {
@@ -915,8 +915,9 @@
         const unsigned idx_lo = idx_base + 0;
         uint64_t value = getOneRegU64(id);
 
-        tc->setFloatRegFlat(idx_hi, (value >> 32) & 0xFFFFFFFF);
-        tc->setFloatRegFlat(idx_lo, value & 0xFFFFFFFF);
+        tc->setRegFlat(RegId(FloatRegClass, idx_hi),
+                (value >> 32) & 0xFFFFFFFF);
+        tc->setRegFlat(RegId(FloatRegClass, idx_lo), value & 0xFFFFFFFF);
     } else if (regIsVfpCtrl(id)) {
         MiscRegIndex idx = decodeVFPCtrlReg(id);
         if (idx == NUM_MISCREGS) {

src/arch/arm/tracers/tarmac_record.cc

diff --git a/src/arch/arm/tracers/tarmac_record.cc b/src/arch/arm/tracers/tarmac_record.cc
index 4ae379b..94dbc51 100644
--- a/src/arch/arm/tracers/tarmac_record.cc
+++ b/src/arch/arm/tracers/tarmac_record.cc
@@ -246,7 +246,8 @@
 
     regValid = true;
     regName  = "f" + std::to_string(regRelIdx);
-    values[Lo] = bitsToFloat32(thread->readFloatReg(regRelIdx));
+    RegId reg(FloatRegClass, regRelIdx);
+    values[Lo] = bitsToFloat32(thread->getReg(reg));
 }
 
 void