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# Copyright (c) 2009, 2012-2013, 2015-2020 ARM Limited
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from m5.params import *
from m5.options import *
from m5.SimObject import *
from m5.objects.Workload import KernelWorkload
class ArmMachineType(Enum):
map = {
'VExpress_EMM' : 2272,
'VExpress_EMM64' : 2272,
'DTOnly' : -1,
}
class ArmFsWorkload(KernelWorkload):
type = 'ArmFsWorkload'
cxx_header = "arch/arm/fs_workload.hh"
cxx_class = 'gem5::ArmISA::FsWorkload'
boot_loader = VectorParam.String([],
"File that contains the boot loader code. Zero or more files may be "
"specified. The first boot loader that matches the kernel's "
"architecture will be used.")
dtb_filename = Param.String("",
"File that contains the Device Tree Blob. Don't use DTB if empty.")
dtb_addr = Param.Addr(0, "DTB or ATAGS address")
cpu_release_addr = Param.Addr(0, "cpu-release-addr property")
machine_type = Param.ArmMachineType('DTOnly',
"Machine id from http://www.arm.linux.org.uk/developer/machines/")
early_kernel_symbols = Param.Bool(False,
"enable early kernel symbol tables before MMU")
enable_context_switch_stats_dump = Param.Bool(False,
"enable stats/task info dumping at context switch boundaries")
panic_on_panic = Param.Bool(False, "Trigger a gem5 panic if the " \
"guest kernel panics")
panic_on_oops = Param.Bool(False, "Trigger a gem5 panic if the " \
"guest kernel oopses")
class ArmFsLinux(ArmFsWorkload):
type = 'ArmFsLinux'
cxx_header = "arch/arm/linux/fs_workload.hh"
cxx_class = 'gem5::ArmISA::FsLinux'
load_addr_mask = 0
@cxxMethod
def dumpDmesg(self):
"""Dump dmesg from the simulated kernel to standard out"""
pass
class ArmFsFreebsd(ArmFsWorkload):
type = 'ArmFsFreebsd'
cxx_header = "arch/arm/freebsd/fs_workload.hh"
cxx_class = 'gem5::ArmISA::FsFreebsd'