arch-riscv: Fix disassembling of immediate for c.lui instruction
For compressed instruction c.lui, the 6-bit immediate is left-shifted by 12
bits in decoding. While the original Gem5 gives the left-shifted value
directly in disassembly.
This patch fixes the problem by adding a new template CILuiExecute to
resume the immediate before outputting it in disassembly.
Note: The immediate is sign-extended to 20-bit to be compatible with GCC.
Signed-off-by: Ian Jiang <firstname.lastname@example.org>
Reviewed-by: Alec Roelke <email@example.com>
Maintainer: Alec Roelke <firstname.lastname@example.org>
Tested-by: kokoro <email@example.com>
2 files changed