tree 9c9829bcbc0825a097243ddd60c992ae49ff0b5d
parent af534729c4d68afeb0fdde59d46922c8e2cc664a
author zhongchengyong <zhongcy93@gmail.com> 1648304636 +0800
committer 钟乘永 <zhongcy93@gmail.com> 1650522880 +0000

arch-riscv: RISCV call/ret instructions aren't decoded correctly

This change adds IsReturn and IsCall flag for RISC-V jump instructions
by define new "JumpConstructor" in standard.isa, and fixes target
overwriting in buildRetPC.

See RAS presentation in spec:
Section 2.5 Page 22 of https://github.com/riscv/riscv-isa-manual/releases/download/Ratified-IMAFDQC/riscv-spec-20191213.pdf
Or:
https://github.com/riscv/riscv-isa-manual/blob/master/src/rv32.tex#:~:text=Return%2Daddress%20prediction,%5Cend%7Btable%7D

Jira Issue: https://gem5.atlassian.net/browse/GEM5-1139

Change-Id: I9728757c9f3f81bd498a0ba04664a003dbded3bf
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58209
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>