tree 0f8554321e90f809ef3f75dadbfb8acb97a53839
parent 062686655ed2028d7a42112b7a7649e75e79db2e
author Gabe Black <gabeblack@google.com> 1573001894 -0800
committer Gabe Black <gabeblack@google.com> 1577479933 +0000

fastmodel: Move ARM but not CortexA76 specific bits to the IRIS TC.

Now that the IRIS thread context can be specific to ARM, some things
which had been pushed to a different level of abstraction can be mvoed
back. This will hopefully allow more code sharing in the future when
other types of CPUs are supported.

Change-Id: Ic3a5f0db53ebe93e18f7507ed71812bce27b6d01
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23788
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>