)]}' { "commit": "32a23114c14cebc5ec0067ac739144b50e412219", "tree": "1bc7685956be9cd1b6530c5a07a8232573e9992b", "parents": [ "e9c7c8168081e38d272e7c83e7f9503b7e8f162f" ], "author": { "name": "Giacomo Travaglini", "email": "giacomo.travaglini@arm.com", "time": "Tue Feb 12 13:09:18 2019 +0000" }, "committer": { "name": "Giacomo Travaglini", "email": "giacomo.travaglini@arm.com", "time": "Thu May 23 08:32:25 2019 +0000" }, "message": "arch-arm: Trap virtual accesses to GICv3 SGI registers\n\nAccording to GICv3 documentation, a virtual write (which means\nHCR.IMO/FMO \u003d 1) to ICC_SGI0R_EL1, ICC_SGI1R_EL1, ICC_ASGI1R_EL1 should\ntrap to EL2.\n\nChange-Id: Ie7a952c2ff08590bb0c6e3854df567d714c2dc94\nSigned-off-by: Giacomo Travaglini \u003cgiacomo.travaglini@arm.com\u003e\nReviewed-by: Andreas Sandberg \u003candreas.sandberg@arm.com\u003e\nReviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17990\nMaintainer: Andreas Sandberg \u003candreas.sandberg@arm.com\u003e\nTested-by: kokoro \u003cnoreply+kokoro@google.com\u003e\n", "tree_diff": [ { "type": "modify", "old_id": "c219bd9ad5a0e341128c5fc1008e917331fcab84", "old_mode": 33188, "old_path": "src/arch/arm/insts/misc64.cc", "new_id": "fed2d9ac85b6404b1bd007870bc2c2c0e97627d0", "new_mode": 33188, "new_path": "src/arch/arm/insts/misc64.cc" }, { "type": "modify", "old_id": "b41134f03ec9efac841b888ca133d6544311f538", "old_mode": 33188, "old_path": "src/arch/arm/utility.cc", "new_id": "2888ebbf38f8422e2dbd2e7bcf041f9374bca8c1", "new_mode": 33188, "new_path": "src/arch/arm/utility.cc" } ] }